The binary shift operators in C are defined via the change of their values, not
the change of the memory representation of them. When reading a value from
little endian out of buffer `buf`, `((uint16_t)buf[1] << 8) | buf[0]` will
thus work regardless of the byte order of the host system.
- Use standard RIOT style `ina2xx_params_t` on initialization as explained in
[1] instead of a custom API
- Provided a default configuration via `ina2xx_params_t` as required by [1] that
works fine for the INA219 breakout board and with an optimal resolution that
still covers the whole range of USB high-power devices (500 mA @ 5V) with a
comfortable safe margin.
- Changed initialization procedure to include a device reset and connectivity
test, as required by [1]
- The calibration value is now calculated by the driver
- This simplifies using the driver a lot
- The user can still choose a trade-off between range and resolution that
matches the application requirements, but now among predefined values
- This allows the driver to easily convert the raw data into meaningful
physical data, as the resolution of the raw data is known
- All measurements are provided as meaningful physical data as required by [1]
[1]: https://github.com/RIOT-OS/RIOT/wiki/Guide:-Writing-a-device-driver-in-RIOT
The INA219 has the exact same interface as the INA220 (including values and
semantics of the configuration register). Thus, this driver can be used for
both. The ina220 has been renamed to ina2xx to reflect this and pseudo modules
for the ina220 and ina219 have been added.
Added driver for the WS2812/SK6812 RGB LEDs often sold as NeoPixels, which due
to their integrated RGB controller can be chained to arbitrary length and
controlled with a single GPIO.
This reverts commit cf01c743a8.
Adding an unexplained delay seemed wrong in the first place, but it fixed
the display on the MCB2388.
Turns out the display was erroneously operating in 8-bit mode due to the
uninitialized flag register.
Why the delay helped here I don't know.
But with #12634 fixing this, this hack is not needed anymore.
The driver can only be used with either 4 or 8 bit modes. Checking if the 5th pin is set in the configuration is enough the determine if 8bit mode should be used or not
The ATmega128RFA1 and ATmega256RFR2 contain a version of this IP
on the MCU.
The radio core behaves mostly like a at86rf231, but all registers
are mapped to memory and radio states can directly generate interrupts
on the CPU.
The ATmega256RFR2 adds support for automatic retransmissions.
This has not been implemented yet.
Co-authored-by: Josua Arndt <jarndt@ias.rwth-aachen.de>
During production it is often desirable for devices to perform
some kind of basic self-test to isolate defects.
For this it is necessary for the initialization not to hang if a
component is faulty / not connected.
This moves an already exising self-test that was previously enabled
as a debug option to an independent compile-time configurable.
It is necessary to call this in _init() before mrf24j40_hardware_reset()
as the reset function uses xtimer_usleep() which will cause another
thread to get scheduled.
If this thread (e.g. rpl or ipv6) then tries to access the netdev, RIOT
will crash.
When hooking up the mrf24j40 to a bluepill board, the driver would
always get stuck on init.
Debugging revealed that it would get stuck in the mrf24j40_reset_state_machine()
function because it expects the RFSTATE to have a special value after reset.
However, the data sheet does not mention this in section 3.1 Reset.
Waiting 192µs should be enough - the value of the RFSTATE is not specified.
The Linux driver also does not wait for the RFSTATE register.
And even without the loop, the driver is functioning fine.
Microchip offers ready-to-use modules with the mrf24j40 chip.
All but the MRF24J40MA integrate an external PA/LNA, they also come
with an RF shield.
If the PA/LNA is not enabled, the signal off these modules is really
poor.
This adds pseudomodules so that the PA/LNA is automatically enabled
when the appropriate module is used.
Change documentation on return codes in periph/timer API to
return 0 on success and (-1) on error by default.
For timer_init this was already the case, but for timer_set,
timer_set_absolute, and timer_clear this is now changed
from 1 to 0 for success, while error remains (-1).
This (re-)introduces the `CC110X_DEFAULT_CHANNEL` preprocessor macro to set the
default channel of the `cc110x` at compile time. The same macro has been used
in the previous version of the driver, so some users might still expect it to
work.
The Atlas Scientific pH OEM sensor is a small circuit to be embedded in
end products to measure the pH value with any commercially available pH
electrode
Rename TMP006 to TMP00x
Add TMP007 sensor support to TMP00X
Change uint8_t reg to uint16_t
Add to doxygen documentation group
Expose compile time configurations
Move defines from .c to .h
Change double to float, because double is not needed
Add TMP007 register information
i2c_release() should not have a return value, as:
- There is no reasonable error handling possible by the caller, so there is no
value in indicating success/failure via the return value to the caller
- There is no legitimate reason to fail *unless* an invalid I2C bus was released
or an I2C bus that was not previously acquired was released
--> This would indicate a bug in the code and should be tackled by an
assert()
- Added required logic to provide correct L2 netstats when the module
netstats_l2 is used.
- Refactored code to use gnrc_netif_hdr_set_netif() over manually setting the
pid to ease future refactoring.
The cc110x driver has been re-written from scratch to overcome the limitations
of the old driver. The main motivation of the rewrite was to achieve better
maintainability by a detailed documentation, reduce the complexity and the
overhead of the SPI communication with the device, and to allow to
simultaneously use transceivers with different configuration regarding the used
base band, the channel bandwidth, the modulation rate, and the channel map.
Features of this driver include:
- Support for the CC1100, CC1101, and the CC1100e sub-gigahertz transceivers.
- Detailed documentation of every aspect of this driver.
- An easy to use configuration API that allows setting the transceiver
configuration (modulation rate, channel bandwidth, base frequency) and the
channel map.
- Fast channel hopping by pre-calibration of the channels during device
configuration (so that no calibration is needed during hopping).
- Simplified SPI communication: Only during start-up the MCU has to wait
for the transceiver to be ready (for the power regulators and the crystal
to stabilize). The old driver did this for every SPI transfer, which
resulted in complex communication code. This driver will wait on start up
for the transceiver to power up and then use RIOT's SPI API like every other
driver. (Not only the data sheet states that this is fine, it also proved to
be reliable in practise.)
- Greatly reduced latency: The RTT on the old driver (@150 kbps data rate) was
about 16ms, the new driver (@250 kbps data rate) has as RTT of ~3ms
(depending on SPI clock and on CPU performance) (measured with ping6).
- Increased reliability: The preamble size and the sync word size have been
doubled compared to the old driver (preamble: 8 bytes instead of 4,
sync word: 4 byte instead of 2). The new values are the once recommended by
the data sheet for reliable communication.
- Basic diagnostic during driver initialization to detect common issues as
SPI communication issues and GDO pin configuration/wiring issues.
- TX power configuration with netdev_driver_t::set() API-integration
- Calls to netdev_driver_t::send() block until the transmission has completed
to ease the use of the API (implemented without busy waiting, so that the
MCU can enter lower power states or other threads can be executed).
- Removed cc110x driver
- Updated all makefiles
- Kept both board specific configurations and support for it in RIOT's
upper layers, so re-implementations don't need to start from zero
The DHT11/DHT21/DHT22 cannot be sampled more than once a second. Previously,
a global cache was added to the SAUL adaption of the dht driver to answer with
stored values for one second after the last read. This however had two
disadvantages:
- The global cache was shared for all DHTXX devices connected. As a result
incorrect values were delivered when reading out multiple sensors over SAUL
with less than 1 second delay in between
- A user of the low level API will had to implement the same caching strategy,
resulting in code duplication
By moving the hold logic to the driver, both limitations can be overcome.
Previously the DHT11/DHT21/DHT22 driver ended up in an infinite loop locking up
RIOT when a communication error occurred. This commit adds a simple timeout to
the communication in order to prevent these lock ups.
Some LoRa modules don't provide all ISR lines. Thus, there are
cases where different interrupts appear simultaneously in the ISR flags.
It's required to use an AND/OR pattern to check which interrupts were triggered.
cpu/stm32_common: cleanup periph eth
boards/nucleo-f767zi: cleanup dependencies
boards/nucleo-f767zi: fix dma configuration attribute for eth
examples/default: add nucleo-767zi in boards with netif
drivers/stm_32_eth: Add header guard for eth_config
Co-authored-By: Robin <robin@chilio.net>
stm32eth: Move to stm32_common periph
cpu/stm32_periph_eth: Rebase to current master branch
- Update DMA to use new vendor headers
- Update send to use iolist. It looks like the packet headers are now transfered as seperate iolist entries which results in the eth periph sending each header as own packet. To fix this a rather ugly workaround is used where the whole iolist content is first copied to a static buffer. This will be fixed soon in another commit
- If MAC is set to zero use luid to generate one
- Small code style fixes
cpu/stm312f7: Add periph config for on-board ethernet
boards/nucleo-f767zi: Add config for on board ethernet
tests/stm32_eth_lwip: Remove board restriction
boards/common/nucleo: Add luid module if stm32 ethernet is used
tests/stm32_eth_gnrc: Add Testcase for gnrc using the stm32 eth periph
stm32_eth: Rework netdev driver layour
tests/stm32_eth_*: Use netdev driver header file for prototypes
stm32_eth: Add auto init for stm32 eth netdev driver
boards/stm32: Enable ethernet conf for nucleo boards
stm32_eth_auto_init: Add dont be pendantic flag
stm32_eth: Remove dma specific stuff from periph_cpu.h
Looks like this was implemented in PR #9171 and 021697ae94 with the same interface.
stm32_eth: Remove eth feature from stm32f4discovery boards
stm32_eth: Migrate to stm32 DMA API
stm32_eth: Add iolist to module deps
stm32_eth: Rework send function to use iolist
stm32_eth: Fix ci build warnings
stm32_eth: Fix bug introduced with iolist usage
stm32_eth: Remove redundant static buffer
stm32_eth: Fix feature dependencies
stm32_eth: Fix wrong header guard name
stm32_eth: Implement correct l2 netstats interface
stm32_eth: Rename public functions to stm32_eth_*
stm32_eth: Fix doccheck
stm32_eth: Move register DEFINE to appropriate header file
stm32_eth: remove untested configuration for f446ze boards
stm32_eth: Move periph configuration struct to stm32_common
stm32_eth: Fix naming of eth_phy_read and eth_phy_write
stm32_eth: Remove obsolete test applications
drivers/eth-phy: add generic Ethernet PHY iface
cpu/stm32f4: implement eth driver peripheral
This implements the ethernet (MAC) peripheral of the stm32f4 as a
netdev driver.
boards/stm32f4discovery: add eth configuration
boards/stm32f4discovery: add feature stm32_eth
tests/stm32_eth_lwip: add test application
- The previous implementation wrongly assumes that sx1272 and 1276
use the same logic level for triggering a reset.
- The timeout values were to short to guarantee proper reset when
coming from POR.
in case of CME or CMS errors, the error codes or human readable strings
are in the response buffer. We want to indicate to the AT driver user
that when tihs case occurrs so he can extract the error codes.
When writing an array of bytes, each byte is converted on the fly to 2 hex characters and sent to the rn2xx3 module. This change ensures each string is correctly terminated, with null character, when written to the module
`tsrb` changed to that type, so there is no reason for us, to keep the
internally used buffer as a `char` (especially since the rest of the
driver already uses `uint8_t`)
The MRF24J40MC/MD/ME modules contain an external power amplifier &
low noise amplifier that has to be enabled manually by setting three bits
in the TESTMODE register.
On MRF24J40MC the power amplifier is powered by a separate voltage regualtor
that has to be enabled by setting GPIO3 to HIGH.
During Sleep and CCA the PA should be disabled.
Co-authored-by: Carton <joel.carron@eeproperty.ch>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Since the API doc doesn't specify what to do with 0
len writings into UART, we cannot assume that is
safe to do it, so this commit prevents it by checking
the length prior to the `uart_write()` operation.
This driver is compliant with the candev interface. It has been tested
with STM32F0 and STM32F2 and STM32F413 ONLY at this time but should be
compliant with other STM32Fx devices
