Gaëtan Harter
bbb6dec054
Merge pull request #11630 from fjmolinas/pr_kinetis_ld
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kinetis/ldscript: handle _rom_offset
2019-06-05 16:12:25 +02:00
francisco
43182bd8f7
cortexm_common/ldscript: use cortexm_rom_offset.ld
2019-06-04 18:05:35 +02:00
francisco
1e5a485539
cortexm_common/ldscript: add common script for rom_offset calculation
2019-06-04 18:05:35 +02:00
Benjamin Valentin
1c3f96495d
ldscripts: move .noinit section behind .bss section
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If the .noinit section starts at the beginning of the RAM,
a bootloader that is unaware of it will clear it.
Instead, move it behind the .bss section, hoping that a bootloader
will always use less .bss memory than RIOT proper.
2019-05-16 23:11:45 +02:00
bf000a1fa5
Merge pull request #11514 from kaspar030/fix_c11_atomic_definitions
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core: fix c11 atomic definitions (fix gcc9 compilation)
2019-05-15 12:29:23 +02:00
Benjamin Valentin
29bf6c712b
cortexm_common: add .noinit section
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Make it possible to specify a section of RAM that is not touched by
the init routing so data can be kept across resets.
This should behave the same as on atmega & lpc2387.
2019-05-14 12:10:27 +02:00
68a4099c1c
cpu/cortexm: fix pointer calculation
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gcc9 started realizing that _sram is basically an uint8_t[1] and thus
HARDFAULT_HANDLER_REQUIRED_STACK_SPACE cannot be added to it without
exceeding the one-sized array.
This commit casts _sram to (uintptr_t) where that happens.
2019-05-13 17:38:10 +02:00
Oleg Artamonov
a5ce6deb02
cpu/cortexm_common: function to check address validity
2019-05-13 09:35:34 +02:00
emmanuelsearch
61c793aa4c
cpu/cortexm_common: Add image_baseaddr support for Cortex-M23
2019-03-26 11:46:00 +01:00
3163b8d6e2
nrf52: use cortexm.ld script when applicable
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The common linker script is not used when the nordic_softdevice_ble is
included
2019-03-13 11:57:44 +01:00
Dylan Laduranty
6d3fda7260
cpu/cortexm: add cortex-m23 support
2019-01-21 17:04:20 +01:00
7226daf33e
Merge pull request #10558 from dylad/pr/update_arm_cmsis
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cpu/cortexm_common: Update ARM CMSIS to V5.4.0
2019-01-16 16:49:14 +01:00
Emmanuel Baccelli
209d90bc00
Merge pull request #10215 from kYc0o/pr/riotboot_multislot
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riotboot: add multislot support
2019-01-15 19:04:28 +01:00
Dylan Laduranty
fdcac731eb
cpu/cortexm_common: Update ARM CMSIS to V5.4.0
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Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2019-01-15 17:35:40 +01:00
Vincent Dupont
06f0c14460
cortexm_common: enable FPU on cortex-m4f
2019-01-03 15:24:20 +01:00
Francisco Acosta
e8660b2012
cpu/cortex_common: add support for multislot
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A second slot is defined with a calculated size, from the
remaining flash after the bootloader and the first slot.
Both slots are defined as equal size, but it can be overriden.
2019-01-02 17:56:11 +01:00
7a6849ca17
cpu/cortexm_common: add riotboot and slot support
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RIOTBOOT_SLOT_LEN is calculated as an hexadecimal value and
handles ROM_LEN defined as kilobytes like '512K'
This enables support for all the cortex-m0+/3/4/7 arch,
so most boards embedding these are potentially supported.
One needs just to ensure that the CPU can be initialised
at least twice.
Co-authored-by: Gaëtan Harter <gaetan.harter@fu-berlin.de>
2018-12-18 19:31:35 +01:00
9cfdf6e379
cpu/cortexm_common: introduce cpu_jump_to_image()
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This new function allows to jump to another execution
environment (VTOR) located at a certain (aligned) address.
It's used to boot firmwares at another location than
`CPU_FLASH_BASE`.
The user needs to ensure that the CPU using this feature
is able to be initialised at least twice while jumping
to the RIOT `reset_handler_default` function, since it
initialises the CPU again (calls cpu_init()).
Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
2018-12-18 19:31:35 +01:00
PeterKietzmann
0be350e352
sys/puf_sram: CPU specific attributes for variables
2018-11-20 08:34:53 +01:00
smlng
59e299635b
cppcheck: add/correct reason for cppcheck-suppress
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Adding and correcting description/rational on why certain cppcheck
warnings or errors are intentionally suppressed.
2018-09-25 12:03:58 +02:00
Pekka Nikander
6aa0a48558
cpu/cortexm_common/cortexm_init: Allow piecewise calling
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Refactor cortexm_init to allow bits and pieces of
it to be called separately, while retaining the
current API, too. Needed for non-standard
Cortex-M initialisation, such as with nRF52
SoftDevice.
2018-08-28 14:07:50 +03:00
Martine Lenders
b305ee4b41
cortexm_common: Mark llvm and gnu as supported toolchains
2018-08-16 16:41:58 +02:00
Gaëtan Harter
7dad2e7096
cortexm_common/ldscript: allow defining FW_ROM_SIZE
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Allow defining a specific rom length to use for linking the firmware,
_fw_rom_length, instead of the default configuration to use the whole rom from
_rom_offset to the end.
* Add cortexm_common/Makefile.include FW_ROM_SIZE configuration
* Add an assertion that _fw_rom_length still respects _rom_length
2018-08-11 11:34:01 +02:00
Gaëtan Harter
c84539fdb3
cortexm_common: allow defining ROM_OFFFSET in a compilation rule
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Define _rom_offset with a conditional evaluated at execution time to allow
setting it in compilation rules and generate in the same make instance different
elf files with different configurations.
2018-08-11 11:33:55 +02:00
Gaëtan Harter
9103dcaeda
cortexm_common: refactor the definition test
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The variables should all always be defined.
2018-08-11 11:33:52 +02:00
Gaëtan Harter
83a617261a
cortexm_common/ldscript: add _fw_rom_length variable
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It will help testing if it is taken into account and for defining for outside
after.
2018-08-11 11:33:47 +02:00
Gaëtan Harter
d9db258411
cortexm_common/ldscript: re-use _rom_offset variable name
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Inspired by kaspar030 version to removing the new _boot_offset variable.
cbf324a66d/cpu/cortexm_common/ldscripts/cortexm.ld
2018-08-11 11:33:39 +02:00
PeterKietzmann
20397c5b15
cortexm_common: add SRAM based PRNG seeder
2018-07-04 17:55:16 +02:00
938677cc83
cpu*: fix doxygen grouping
2018-06-11 19:12:02 +02:00
smlng
34ade00db9
cpu/cortex_common: fix indention in vector table
2018-05-24 11:26:46 +02:00
Joakim Nohlgård
77449aa592
Merge pull request #9103 from gebart/pr/cortexm-vectors-const
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cortexm: const ISR vectors
2018-05-11 21:35:12 +02:00
Joakim Nohlgård
4532c348b4
cortexm_common: Adjust ldscript memory segment attributes
2018-05-09 06:44:12 +02:00
Joakim Nohlgård
b8d6bcdb07
cortexm_common: specify load segment instead of load address for .data
2018-05-09 00:41:27 +02:00
Joakim Nohlgård
f073fdb34f
cortexm_common: Mark base ISR vector as const
2018-05-09 00:32:28 +02:00
c9c7cd4951
cpu: cortexm_common: use thread_yield_higher() in cortexm_isr_end()
2018-04-13 10:12:39 +02:00
Girts Folkmanis
b9744f698f
cortexm_common: don't try to set MEMFAULTENA on ARMv6-M
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Before this change, if one tried to build a Cortex-M0+ target that had
an MPU, compilation would fail due to missing
'SCB_SHCSR_MEMFAULTENA_Msk' in SCB structure. Cortex-M0+ is a ARMv6-M
arch (unlike most other targets that have MPU support). ARMv6-M has more
limited support for fault conditions, see ARMv6-M Architecture Reference
Manual, D3.6.2.
2018-03-12 19:57:29 -07:00
Francisco Acosta
ac9328381c
cpu/cortexm_common: add NOP after WFI to avoid hardfault on stm32l152
2018-02-12 15:10:34 +01:00
99d484f336
cpu/cortexm_common: select bitarithm_lsb() by available instructions
2018-01-16 23:35:14 +01:00
32c10ae2c9
core, cpu: rename thread_start_threading() -> cpu_switch_context_exit()
2017-11-16 14:40:16 +01:00
86665b71bf
cpu: adapt to COREIF_NG removal
2017-11-16 14:40:16 +01:00
f6d7e54228
Merge pull request #7739 from kYc0o/factorise_sam0_ldscripts
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ld: refactor sam0 ldscripts
2017-11-13 11:36:25 +01:00
Joakim Nohlgård
e3d5a70e0c
cpu/cortexm: Remove leftover _estack declarations
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These are leftovers from before the Cortex-M common ISR vectors were
split into vectors_cortexm.c
2017-11-10 15:38:14 +01:00
kYc0o
d25fd647e7
cpu/cortexm_common/ldscripts: add common linker script for cortexm family
2017-11-07 15:05:43 +01:00
kYc0o
4d681ac862
cpu/cortexm_common/Makefile.include: define linker length vars if set
2017-11-07 15:05:43 +01:00
268e763d63
make: move mcuboot related stuff to makefiles/mcuboot.mk
2017-11-07 12:28:41 +01:00
3ec8126c84
cpu: cortexm: provide periph_pm for all cortexm
2017-11-06 12:01:19 +01:00
a20745b6c5
cpu: make use of Makefile.periph
2017-11-06 12:01:19 +01:00
7c9f6a4763
Merge pull request #7907 from gebart/pr/cortexm-fix-hardfault-print
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cortexm_common: Correct offset for hardfault stack
2017-11-02 15:59:36 +01:00
b5b970d760
cpu: cortexm: add Makefile.features
2017-11-02 12:59:45 +01:00
Joakim Nohlgård
2f55fdcec4
cortexm_common: Correct offset for hardfault stack
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The required space for the hardfault handler is defined by
HARDFAULT_HANDLER_REQUIRED_STACK_SPACE, which is given in bytes,
this length is added to &_sram to find a lower limit on the amount of
stack space that the hard fault handler can work with. The _sram
variable, was mistakenly defined as a uint32_t, which makes &_sram into
a uint32_t*, which through pointer addition, made the required space 4
times as big as it was supposed to. By changing the type of _sram to
uint8_t, the required stack space is correctly computed.
The symptom was that the hardfault handler always reported that the
stack pointer had been corrupted and it was impossible to get any useful
information from the crash text.
2017-10-30 07:08:33 +01:00
14646fb332
Merge pull request #7776 from kaspar030/fix_cortexm_vectors_lto
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cpu: cortexm: fix LTO issue for shared vector table
2017-10-21 00:02:48 +02:00
96b1b76ac9
cpu: cortexm: fix LTO issue for shared vector table (see #5774 )
2017-10-20 22:19:44 +02:00
167bd30453
all: fix my email address
2017-10-20 15:02:41 +02:00
Hauke Petersen
5920d99752
pm: fix weak-based default implementations
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Instead of using `weak` function definitions, this PR handles
default implementations using `PROVIDES_x` defines, allowing
for cpus/pm realted modules to use their own implementations.
2017-10-16 14:27:35 +02:00
Vincent Dupont
dd49f22532
cpu/cortexm_common: use irq_disable/irq_restore
2017-10-06 17:40:47 +02:00
Hauke Petersen
3ede8e9d95
cpu: force size of CPU specific vector table
2017-09-04 15:13:43 +02:00
Hauke Petersen
1a20ef8223
cpu: unified cortex-m base interrupt vector
2017-09-04 15:13:32 +02:00
kYc0o
3b6fad4dde
cpu/cortexm_common: add image headers default size
2017-07-17 14:48:30 +02:00
kYc0o
1a52c80bf4
cpu/cortexm_common/ldscripts: add multislot variables
2017-07-17 14:48:28 +02:00
smlng
692cf96297
doc: fix doxygen grouping of cpu periph drivers
2017-06-26 14:42:11 +02:00
Joakim Nohlgård
dc3aa13e90
cortexm_common: Introduce bitbanding macros
2017-06-09 05:19:13 +02:00
Hauke Petersen
fd981dff22
cpu/cortexm: set VTOR for selected M0+ CPUs
2017-06-02 11:53:59 +02:00
0fcc7d3834
cleanup: apply headerguard script output
2017-05-24 17:54:02 +02:00
Hauke Petersen
10a7486246
cpu/cortex_common: added support for Cortex-M7
2017-05-08 09:16:11 +02:00
Hauke Petersen
f875c3efc2
cpu/cortexm: s/cpu_sleep_until_.../cortexm_sle.../
2017-05-04 13:45:11 +02:00
Vincent Dupont
f656a31e58
cpu/cortexm_common: use linker variable to initialize SCB->VTOR
2017-03-17 18:07:22 +01:00
Hauke Petersen
37d4f44379
cpus: mv vendor headers to include/vendor/.
2017-03-07 08:55:15 +01:00
Michael Andersen
a72df9f015
cpu/cortexm_common: fix periph_pm typo
2017-02-22 15:58:20 -08:00
Joakim Nohlgård
20b184604b
cortexm_common: Remove atomic_arch
2017-02-08 16:23:49 +01:00
Hauke Petersen
3da9ceb705
cpu/cortexm: fixed cortexm_sleep()
2017-01-27 13:00:24 +01:00
Oleg Hahm
c5abb08316
Merge pull request #4058 from daniel-k/pr/gdb_threads_openocd
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cortex_m: Add debug symbols for OpenOCD/GDB thread support
2017-01-25 17:49:42 +01:00
be7771e0b9
cpu: cortexm_common: add define for number of non-isr exceptions
2017-01-25 10:22:03 +01:00
d8f0eaf127
cpu: cortexm: fix signed<->unsigned compare
2017-01-25 10:10:47 +01:00
d1db946188
Merge pull request #6344 from haukepetersen/opt_pm_misc
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pm: misc cleanup and fixes
2017-01-24 14:07:36 +01:00
Oleg Hahm
7ee7801c10
*: remove trailing underscores from header guards
2017-01-19 18:30:53 +01:00
Hauke Petersen
801eeceb59
cpu/cortexm: removed unused pm include in panic.c
2017-01-19 11:05:44 +01:00
Hauke Petersen
409516c4d2
cpu/cortexm: moved pm.c to periph/pm.c
2017-01-19 11:05:44 +01:00
079a6ec5f4
Merge pull request #6346 from haukepetersen/opt_pm_cortexmsleep
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cpu/cortexm: added shared cortexm_sleep() function
2017-01-18 10:55:04 +01:00
daniel-k
9d403d95ce
cortex_m: Add debug symbols for OpenOCD/GDB thread support
2017-01-16 20:50:35 +01:00
Joakim Nohlgård
8c82d9952b
cortexm_common: Fix -Wsign-compare warning in cortexm_init
2017-01-16 08:55:08 +01:00
Joakim Nohlgård
2c5e1065c5
cortexm_common: Fix unused parameter warnings in mpu_configure
2017-01-16 08:55:08 +01:00
Hauke Petersen
ed5d7ac0fd
cpu/cortexm: added shared cortexm_sleep() function
2017-01-13 12:26:42 +01:00
807a190e20
cpu: cortexm: adapt to periph/pm
2017-01-12 16:26:01 +01:00
ca7bf15ac4
core: panic: adapt to pariph/pm
2017-01-12 16:26:01 +01:00
0194091673
remove obsolete lpm code
2017-01-12 11:24:15 +01:00
Hauke Petersen
04b246cb01
cpu/cortexm_common: added cortexm_isr_end() function
2016-12-21 11:27:46 +01:00
Ian Martin
299a3eed3b
cpu/cortexm_common: simplify ARVALID tests and fix BFARVALID test.
2016-12-01 17:18:06 -05:00
zhuoshuguo
a60fa5b8d3
cpu/cortexm_common: fix include guards.
2016-11-16 11:45:03 +01:00
0dfcefc003
cpu: cortexm_common: fix compile warning
2016-10-27 15:20:56 +02:00
Ian Martin
22b5de86a5
add mpu_stack_guard pseudomodule (just Cortex-M for now)
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triggers an exception during stack overflow,
but at a cost of 32-63 bytes of RAM per thread.
2016-10-24 12:40:44 -04:00
Ian Martin
b7bd6b3479
cpu/cortexm_common: add Memory Protection Unit (MPU) driver
2016-10-19 11:12:36 -04:00
Joakim Nohlgård
11c11a5ecf
Merge pull request #5727 from kaspar030/fix_panic_compile
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cpu: cortexm_common: fix compile warning
2016-10-14 10:08:42 +02:00
3dfafde027
cpu: cortexm_common: fix compile warning
2016-10-07 12:06:43 +02:00
5a03f08f91
cpu: cortexm_common: compile thread_arch.c without LTO
2016-08-29 13:30:17 +02:00
0bd2805b0c
cpu: cortexm_common: explicitly define isr_pendsv and isr_svc
2016-08-29 13:30:17 +02:00
Antoine Faure
31e675b359
cpu: cortex_common: Add entry point to tell gdb where to start
2016-07-23 13:27:47 +02:00
Joakim Nohlgård
5cd91bc784
cortexm: Hard fault: Try to output as much as possible even with corrupt stack
2016-07-20 13:25:23 +02:00
Joakim Nohlgård
b02e0eca47
ps: Add current stack pointer and start of stack to isr_stack ps output (DEVELHELP)
2016-07-12 10:17:49 +02:00
Joakim Nohlgård
cb19a4c709
cortexm_common: Fix isr_stack_usage
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Refactor and add multiply by word size to get the usage in number of
bytes instead of in number of words.
Verified implementation by manual memory inspection in GDB.
2016-06-20 14:33:17 +02:00
Joakim Nohlgård
4c91121372
Merge pull request #5455 from locicontrols/move-stack
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cortexm_common: move the stack to the bottom of RAM
2016-06-20 14:28:10 +02:00
