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Commit Graph

5024 Commits

Author SHA1 Message Date
benpicco
c32be01b7a
Merge pull request #13053 from basilfx/feature/efm32_adc_status
cpu/efm32: fix incorrect ADC status register
2020-02-21 18:59:53 +01:00
benpicco
8d77ec55ae
Merge pull request #13409 from aabadie/pr/cpu/nrf_gpio_t
cpu/nrf5x: provide gpio_t type definition
2020-02-21 18:55:46 +01:00
9cebd757a2
cpu/nrf5x: update GPIO_UNDEF value
The gpio_t value is uint8_t so use UINT8_MAX for GPIO_UNDEF
2020-02-19 19:16:58 +01:00
f568162f9b
cpu/nrf5x: provide specific gpio_t definition 2020-02-19 19:16:58 +01:00
Benjamin Valentin
93d536f761 cpu/sam0_common: samr30 add PIN_(.*)_EIC_EXTINT_NUM to vendor header
samr30 is the only MCU of this family where the vendor files do not
define the PIN_($pin)_EIC_EXTINT_NUM macro yet.

This macro is needed to create a generic EXTI configuration for all
sam0 MCUs.

The defines were generated with

    sed -Ei '/define PIN_(.*)_EIC_EXTINT([0-9]*)/
            {h; x;
             s/define PIN_(.*)A_EIC_EXTINT([0-9]*)(.*)/
               define PIN_\1A_EIC_EXTINT_NUM       _L_\(\2\)
               \/**< \brief EIC signal: PIN_\1 External Interrupt Line *\/
              /g; G}' samr30g18a.h samr30e18a.h
2020-02-18 18:28:10 +01:00
d7c0102115
cpu/cortexm: move CPU_ARCH/FAM to Makefile.features 2020-02-17 16:02:48 +01:00
1a75f26133 cpu/*: update to PM_BLOCKER_INITIAL as single value 2020-02-14 12:06:05 +01:00
Bas Stottelaar
3141e91380
Merge pull request #13174 from fjmolinas/pr_efm32_cleanup
cpu/efm32: cleanup
2020-02-12 22:42:10 +01:00
Dylan Laduranty
cc17d3c2ba
Merge pull request #13350 from benpicco/saml21-asf
cpu/sam0_common: update saml21 vendor files to version 1.2.125
2020-02-12 14:27:39 +01:00
Francisco Molina
9a7ddde05a
cpu/efm32/families: remove cpus.txt 2020-02-12 12:56:00 +01:00
Francisco Molina
ae1c54b045
cpu/efm32/efm32-info: use efm32-info instead of cpus.txt 2020-02-12 12:55:59 +01:00
Bas Stottelaar
8cf186c913
cpu/efm32/families: add efm32-info.mk 2020-02-12 12:55:59 +01:00
Francisco Molina
a0462488e8
cpu/efm32: add families/%/Makefile.include
Move INCLUDES and VECTORS_O to Makefile.include duplicate EFM32_HEADER
while cpu.txt is not migrated.
2020-02-12 12:55:58 +01:00
Francisco Molina
5715f13323
cpu/efm32/Makefile: DIRS based on USEMODULE 2020-02-12 12:55:57 +01:00
Benjamin Valentin
1333a5698c cpu/sam0_common: update saml21 vendor files to version 1.2.125
This release adds EXTINT defines compatible with later versions of
the sam0 series of MCUs.
2020-02-12 11:46:36 +01:00
Benjamin Valentin
6f2cdb95da cpu/saml21: pm: don't check individual part numbers
Just check if the define is availiable instead.
2020-02-12 11:44:20 +01:00
Francisco Molina
67ec9a298d
cpu/efm32: remove exports 2020-02-11 22:46:53 +01:00
Francisco Molina
7cc65c9b62
cpu/efm32/Makefile.include: remove CPU_FAM and CPU_ARCH 2020-02-11 22:46:52 +01:00
Francisco Molina
085665ff23
cpu/efm32/Makefile.features: fix typo 2020-02-11 22:46:51 +01:00
Francisco Molina
95f8de8030
cpu/efm32: move dependency resolution to makefile.dep 2020-02-11 22:46:48 +01:00
Dylan Laduranty
03b6658721
Merge pull request #13313 from benpicco/samd21-asf
cpu/sam0_common: update samd21 vendor files to version 1.3.395
2020-02-11 21:50:56 +01:00
3ac25c3ac9
Merge pull request #12556 from bergzand/wip/stusbdev
stm32_common: Add USB OTG FS/HS usbdev peripheral driver
2020-02-11 20:39:46 +01:00
benpicco
de89f3a459
Merge pull request #13319 from maribu/avr-reboot
cpu/atmega_common: Fix reboot issues
2020-02-11 17:18:12 +01:00
bd844435af
stm32: Add dw USB OTG FS usbdev driver 2020-02-11 15:50:18 +01:00
benpicco
628aa1197e
Merge pull request #13331 from btcven/2020_02_10-sram-size
cc26x2_cc13x2: use correct RAM value
2020-02-11 15:43:38 +01:00
c30df3cac9
Merge pull request #7572 from kaspar030/zptr
core: add pointer compression header
2020-02-11 15:25:24 +01:00
benpicco
33291ad675
Merge pull request #13306 from fjmolinas/pr_samr21_use_xosc
boards/sam[r/d]21-xpro: prefer XOSC32K for RTC/RTT (GCLK2)
2020-02-11 15:18:36 +01:00
bbf274aecc cpu/kinetis: immediately convert shell expansion of RAM_BASE_ADDR 2020-02-11 13:59:59 +01:00
496ae49692
Merge pull request #13091 from bergzand/pr/mpu/enable_once
cortexm_common/mpu: Only enable during low low level init
2020-02-11 11:11:13 +01:00
Jean Pierre Dudey
de50518146
cc26x2_cc13x2: use correct RAM value
Previous value was 20 K, now it's 80 K. The older family of these MCUs
(cc13x0, cc26x0) had that size, currently for cc13x2 and cc26x2 it's
80 K.

Signed-off-by: Jean Pierre Dudey <jeandudey@hotmail.com>
2020-02-10 18:38:15 -05:00
Benjamin Valentin
9f4920329b cpu/lpc2387: clear BODR if POR is set
From the data sheet:

> **Note:** Only in case when a reset occurs and the POR = 0, the BODR bit
indicates if the V DD(DCDC)(3V3) voltage was below 2.6 V or not.

So the value of BODR is undefined if POR is set.
Clear it to bring it to a defined state.
2020-02-10 23:04:47 +01:00
Benjamin Valentin
76e19602a2 cpu/lpc2387: rename cpu_woke_from_backup()
The function would always return `true` after early boot, so it
is not very useful for applications.

Now it will only (but always) return true when we woke from Deep Sleep
*after* early boot. This makes it behave the same ways as the function
of the same name on SAME54.

Rename the existing function to cpu_backup_ram_is_initialized() to better
match it's semantics.
2020-02-10 23:04:47 +01:00
Benjamin Valentin
64107dd3a9 cpu/lpc2387: rtc: only initialize RTC after cold boot or external reset
On the MCB2388 plugging the power will result in both the POR and EXTR
bit being set.
Not sure if this is a property of the board, but it means RTC is also
reset after programming, so it behaves just like Backup RAM.

If we woke from Deep Sleep the POR bit will be cleared, so the RTC is not
reset.
2020-02-10 23:04:47 +01:00
Benjamin Valentin
80dde82c86 cpu/lpc2387: clear POR bit if we woke from Deep Sleep
RSIR is 0x1 (POR) if we woke from Deep Sleep.
This makes it hard to distinguish between real power-on and waking from
Deep Sleep, which is why the Backup RAM signature was introduced.

However, calling cpu_woke_from_backup() a second time will always return
true, as the signature will have been set up by early boot then.

Thus, clear the POR bit if the signature was already in place.
The result is:

	RSIR == 0 -> woke from sleep
	RSIR == 1 -> cold boot
2020-02-10 23:04:46 +01:00
Benjamin Valentin
6dbbc8f33a cpu/lpc2387: rtc: remove _rtc_set()
Calling localtime() adds considerable overhead.
There are easier ways to set the date to 1970.

For tests/periph_rtc this results in this ROM change:

master:

   text    data     bss     dec     hex
  31328     240   98064  129632   1fa60

with this patch:

   text    data     bss     dec     hex
  20036     140   98168  118344   1ce48
2020-02-10 23:04:46 +01:00
Francisco
e2dc125fb3
Merge pull request #13308 from maribu/atmega_state_cleanup
cpu/atmega_common: Cleanup state flags
2020-02-10 17:37:24 +01:00
Marian Buschsieweke
60ee8cd513
cpu/atmega_common: Fix pm_reboot with LTO
The reboot process for ATmegas is to enable the watchdog timer and loop until
the wdt reboots this MCU. However, this reboot will keep the wdt configuration,
so that the wdt needs to be disabled during boot. This is done in get_mcusr,
but without the attribute "used" it will be optimized out in LTO builds. This
commits adds the attribute "used" to get_mcusr.

Also simplified the backward compatibility with older ATmegas (currently not
supported by RIOT) on outdated versions of avrlibc.
2020-02-10 17:08:09 +01:00
benpicco
b44cf48a87
Merge pull request #13246 from benpicco/lpc23xx-spi
cpu/lpc2387: make SPI configurable
2020-02-10 17:01:41 +01:00
Benjamin Valentin
13e578bc84 cpu/lpc2387: implement periph/adc
lpc23xx has a 10 bit ADC with up to 8 channels.

The ADC should be clocked at 4.5 MHz or less, so it uses
(72MHz CCLK / 8) / 2.
2020-02-10 13:25:26 +01:00
Benjamin Valentin
e03780c8ca cpu/sam0_common: update samd21 vendor files to version 1.3.395
This release adds EXTINT defines compatible with later versions of
the sam0 series of MCUs.
2020-02-08 03:28:14 +01:00
Dylan Laduranty
b5bb846d3a
Merge pull request #13312 from benpicco/cpu/sam0-vendor_cleanup
cpu/sam0_common: use vendor provided MCU header dispatch
2020-02-07 20:33:45 +01:00
Francisco Molina
238d56e474
cpu/samd21/cpu: reset GCLK before configuring them 2020-02-07 16:11:42 +01:00
Francisco Molina
2e542a2488
cpu/samd21: cleanup XOSC32K initialization 2020-02-07 15:54:56 +01:00
Francisco Molina
9ab22b6926
cpu/samd21: add GEN3_ULP32K selector 2020-02-07 15:53:32 +01:00
benpicco
dfcf155aa6
Merge pull request #13311 from benpicco/cpu/samr21-asf
cpu/sam0_common: update samr21 vendor files to version 1.1.72
2020-02-07 13:06:11 +01:00
Benjamin Valentin
b0078b1a98 cpu/sam0_common: update samr21 vendor files to version 1.1.72
This release adds EXTINT defines compatible with later versions of
the sam0 series of MCUs.
2020-02-07 12:14:45 +01:00
benpicco
66c7c63c94
Merge pull request #13061 from gschorcht/cpu/esp32/rtc_xtal_32k
cpu/esp32: allow external 32 kHz crystal for the RTC hardware timer
2020-02-07 10:24:22 +01:00
Gunar Schorcht
4c0cfdcc8e cpu/esp32: allow external 32 kHz crystal for RTC 2020-02-07 00:46:16 +01:00
Benjamin Valentin
bd1953dd80 cpu/sam0_common: use vendor files to dispatch MCU headers
Instead of manually re-creating the files from ASF, just use
the vendor provided dispatch headers and ease the maintainance
burden.
2020-02-06 19:52:05 +01:00
Benjamin Valentin
fd793b8917 cpu/samd51: add common header file from ASF
Somehow I forgot to commit this.
2020-02-06 19:49:50 +01:00