Merge pull request #12556 from bergzand/wip/stusbdev

stm32_common: Add USB OTG FS/HS usbdev peripheral driver

boards/common/stm32/include/cfg_usb_otg_fs.h

@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2019 Koen Zandberg
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_common_stm32
+ * @{
+ *
+ * @file
+ * @brief       Common configuration for STM32 OTG FS peripheral
+ *
+ * @author      Koen Zandberg <koen@bergzand.net>
+ */
+
+#ifndef CFG_USB_OTG_FS_H
+#define CFG_USB_OTG_FS_H
+
+#include "periph_cpu.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enable the full speed USB OTG peripheral
+ */
+#define STM32_USB_OTG_FS_ENABLED
+
+/**
+ * @name common USB OTG FS configuration
+ * @{
+ */
+static const stm32_usb_otg_fshs_config_t stm32_usb_otg_fshs_config[] = {
+    {
+        .periph   = (uint8_t *)USB_OTG_FS_PERIPH_BASE,
+        .rcc_mask = RCC_AHB2ENR_OTGFSEN,
+        .phy      = STM32_USB_OTG_PHY_BUILTIN,
+        .type     = STM32_USB_OTG_FS,
+        .irqn     = OTG_FS_IRQn,
+        .ahb      = AHB2,
+        .dm       = GPIO_PIN(PORT_A, 11),
+        .dp       = GPIO_PIN(PORT_A, 12),
+        .af       = GPIO_AF10,
+    }
+};
+/** @} */
+
+/**
+ * @brief Number of available USB OTG peripherals
+ */
+#define USBDEV_NUMOF           ARRAY_SIZE(stm32_usb_otg_fshs_config)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CFG_USB_OTG_FS_H */
+/** @} */

boards/common/stm32/include/cfg_usb_otg_hs_fs.h

@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2019 Koen Zandberg
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     boards_common_stm32
+ * @{
+ *
+ * @file
+ * @brief       Common configuration for STM32 OTG HS peripheral with FS phy
+ *
+ * @author      Koen Zandberg <koen@bergzand.net>
+ */
+
+#ifndef CFG_USB_OTG_HS_FS_H
+#define CFG_USB_OTG_HS_FS_H
+
+#include "periph_cpu.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+ * @brief Enable the full speed USB OTG peripheral
+ */
+#define STM32_USB_OTG_HS_ENABLED
+
+/**
+ * @name common USB OTG FS configuration
+ * @{
+ */
+static const stm32_usb_otg_fshs_config_t stm32_usb_otg_fshs_config[] = {
+    {
+        .periph   = (uint8_t *)USB_OTG_HS_PERIPH_BASE,
+        .rcc_mask = RCC_AHB1ENR_OTGHSEN,
+        .phy      = STM32_USB_OTG_PHY_BUILTIN,
+        .type     = STM32_USB_OTG_HS,
+        .irqn     = OTG_HS_IRQn,
+        .ahb      = AHB1,
+        .dm       = GPIO_PIN(PORT_B, 14),
+        .dp       = GPIO_PIN(PORT_B, 15),
+        .af       = GPIO_AF12,
+    }
+};
+/** @} */
+
+/**
+ * @brief Number of available USB OTG peripherals
+ */
+#define USBDEV_NUMOF           ARRAY_SIZE(stm32_usb_otg_fshs_config)
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CFG_USB_OTG_HS_FS_H */
+/** @} */

boards/nucleo-f207zg/Makefile.features

@@ -10,6 +10,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Put other features for this board (in alphabetical order)
 FEATURES_PROVIDED += riotboot

boards/nucleo-f207zg/include/periph_conf.h

@@ -24,6 +24,7 @@
 #include "periph_cpu.h"
 #include "f2/cfg_clock_120_8_1.h"
 #include "cfg_i2c1_pb8_pb9.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/nucleo-f412zg/Makefile.features

@@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # load the common Makefile.features for Nucleo-144 boards
 include $(RIOTBOARD)/common/nucleo144/Makefile.features

boards/nucleo-f412zg/include/periph_conf.h

@@ -25,6 +25,7 @@
 #include "f4/cfg_clock_100_8_1.h"
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/nucleo-f413zh/Makefile.features

@@ -12,6 +12,7 @@ FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # load the common Makefile.features for Nucleo boards
 include $(RIOTBOARD)/common/nucleo144/Makefile.features

boards/nucleo-f413zh/include/periph_conf.h

@@ -25,6 +25,7 @@
 #include "f4/cfg_clock_100_8_1.h"
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/nucleo-f429zi/Makefile.features

@@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # load the common Makefile.features for Nucleo boards
 include $(RIOTBOARD)/common/nucleo144/Makefile.features

boards/nucleo-f429zi/include/periph_conf.h

@@ -24,6 +24,7 @@
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_spi_divtable.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/nucleo-f446ze/Makefile.features

@@ -8,6 +8,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # load the common Makefile.features for Nucleo boards
 include $(RIOTBOARD)/common/nucleo144/Makefile.features

boards/nucleo-f446ze/include/periph_conf.h

@@ -24,6 +24,7 @@
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_spi_divtable.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/nucleo-f722ze/Makefile.features

@@ -7,6 +7,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Put other features for this board (in alphabetical order)
 FEATURES_PROVIDED += riotboot

boards/nucleo-f722ze/include/periph_conf.h

@@ -24,6 +24,7 @@
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/nucleo-f746zg/Makefile.features

@@ -7,6 +7,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Put other features for this board (in alphabetical order)
 FEATURES_PROVIDED += riotboot

boards/nucleo-f746zg/include/periph_conf.h

@@ -24,6 +24,7 @@
 #include "cfg_i2c1_pb8_pb9.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/nucleo-f767zi/Makefile.features

@@ -9,6 +9,7 @@ FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 FEATURES_PROVIDED += periph_eth
 
 # Put other features for this board (in alphabetical order)

boards/nucleo-f767zi/include/periph_conf.h

@@ -25,6 +25,7 @@
 #include "cfg_spi_divtable.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/pyboard/Makefile.features

@@ -7,3 +7,4 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev

boards/pyboard/Makefile.include

@@ -1,3 +1,6 @@
+# we use shared STM32 configuration snippets
+INCLUDES += -I$(RIOTBOARD)/common/stm32/include
+
 # define the default port depending on the host OS
 PORT_LINUX ?= /dev/ttyUSB0
 PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.SLAB_USBtoUART*)))

boards/pyboard/include/periph_conf.h

@@ -22,6 +22,7 @@
 #define PERIPH_CONF_H
 
 #include "periph_cpu.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/stm32f429i-disc1/Makefile.features

@@ -6,6 +6,7 @@ FEATURES_PROVIDED += periph_i2c
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Put other features for this board (in alphabetical order)
 FEATURES_PROVIDED += riotboot

boards/stm32f429i-disc1/include/periph_conf.h

@@ -23,6 +23,7 @@
 #include "f4/cfg_clock_168_8_1.h"
 #include "cfg_spi_divtable.h"
 #include "cfg_timer_tim5.h"
+#include "cfg_usb_otg_hs_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/stm32f4discovery/Makefile.features

@@ -10,6 +10,7 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev
 
 # Various other features (if any)
 FEATURES_PROVIDED += arduino

boards/stm32f4discovery/include/periph_conf.h

@@ -23,6 +23,7 @@
 #include "periph_cpu.h"
 #include "f4/cfg_clock_168_8_0.h"
 #include "cfg_spi_divtable.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/stm32f723e-disco/Makefile.features

@@ -9,3 +9,4 @@ FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_spi
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev

boards/stm32f723e-disco/include/periph_conf.h

@@ -21,6 +21,7 @@
 
 #include "periph_cpu.h"
 #include "cfg_rtt_default.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

boards/stm32f769i-disco/Makefile.features

@@ -6,3 +6,4 @@ FEATURES_PROVIDED += periph_rtc
 FEATURES_PROVIDED += periph_rtt
 FEATURES_PROVIDED += periph_timer
 FEATURES_PROVIDED += periph_uart
+FEATURES_PROVIDED += periph_usbdev

boards/stm32f769i-disco/include/periph_conf.h

@@ -22,6 +22,7 @@
 #include "periph_cpu.h"
 #include "cfg_rtt_default.h"
 #include "cfg_timer_tim2.h"
+#include "cfg_usb_otg_fs.h"
 
 #ifdef __cplusplus
 extern "C" {

cpu/stm32_common/Makefile.dep

@@ -3,3 +3,7 @@ USEMODULE += pm_layered
 
 # include stm32 common functions and stm32 common periph drivers
 USEMODULE += stm32_common stm32_common_periph
+
+ifneq (,$(filter periph_usbdev,$(FEATURES_USED)))
+  USEMODULE += xtimer
+endif

cpu/stm32_common/include/periph_cpu_common.h

@@ -573,6 +573,46 @@ typedef struct {
 } i2c_timing_param_t;
 #endif
 
+/**
+ * @brief USB OTG peripheral type.
+ *
+ * High speed peripheral is assumed to have DMA support available.
+ *
+ * @warning Only one of each type is supported at the moment, it is not
+ * supported to have two FS type or two HS type peripherals enabled on a
+ * single MCU.
+ */
+typedef enum {
+    STM32_USB_OTG_FS = 0,   /**< Full speed peripheral */
+    STM32_USB_OTG_HS = 1,   /**< High speed peripheral */
+} stm32_usb_otg_fshs_type_t;
+
+/**
+ * @brief Type of USB OTG peripheral phy.
+ *
+ * The FS type only supports the built-in type, the HS phy can have either the
+ * FS built-in phy enabled or the HS ULPI interface enabled.
+ */
+typedef enum {
+    STM32_USB_OTG_PHY_BUILTIN,
+    STM32_USB_OTG_PHY_ULPI,
+} stm32_usb_otg_fshs_phy_t;
+
+/**
+ * @brief stm32 USB OTG configuration
+ */
+typedef struct {
+    uint8_t *periph;                /**< USB peripheral base address */
+    uint32_t rcc_mask;              /**< bit in clock enable register */
+    stm32_usb_otg_fshs_phy_t phy;   /**< Built-in or ULPI phy */
+    stm32_usb_otg_fshs_type_t type; /**< FS or HS type */
+    uint8_t irqn;                   /**< IRQ channel */
+    uint8_t ahb;                    /**< AHB bus */
+    gpio_t dm;                      /**< Data- gpio */
+    gpio_t dp;                      /**< Data+ gpio */
+    gpio_af_t af;                   /**< Alternative function */
+} stm32_usb_otg_fshs_config_t;
+
 /**
  * @brief   Get the actual bus clock frequency for the APB buses
  *
@@ -745,6 +785,10 @@ int dma_configure(dma_t dma, int chan, const volatile void *src, volatile void *
 #include "candev_stm32.h"
 #endif
 
+#ifdef MODULE_PERIPH_USBDEV
+#include "usbdev_stm32.h"
+#endif
+
 /**
  * @brief STM32 Ethernet configuration mode
  */

cpu/stm32_common/include/usbdev_stm32.h

@@ -0,0 +1,138 @@
+/*
+ * Copyright (C) 2019 Koen Zandberg
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @defgroup    cpu_stm32_common_usbdev stm32 USB OTG FS/HS peripheral
+ * @ingroup     cpu_stm32_common
+ * @brief       USB interface functions for the stm32 class devices
+ *
+ * @{
+ *
+ * @file
+ * @brief       USB interface functions for the stm32 OTG FS/HS class devices
+ *
+ * The stm32f2, stm32f4 and stm32f7 have a common USB OTG FS capable USB
+ * peripheral.
+ *
+ * Two versions are currently known to exist with subtle differences
+ * in some registers. The CID register of the peripheral indicates this version,
+ * 0x00001200 for one version of the full speed peripheral and 0x00002000 for
+ * the other version of the full speed peripheral.
+ * The main difference is in the GCCFG register, where the 1.2 version has a
+ * NOVBUSSENS bit and the 2.0 version has a VBDEN bit. This difference is used
+ * to detect the IP version.
+ * The 2.0 version also has more advanced USB low power mode support.
+ *
+ * For the end user, the main difference is the 1.2 version  having 4 endpoints
+ * and the 2.0 version having 6 endpoints. The 2.0 version also supports a
+ * number of USB low power modes.
+ *
+ * @author      Koen Zandberg <koen@bergzand.net>
+ */
+
+#ifndef USBDEV_STM32_H
+#define USBDEV_STM32_H
+
+#include <stdint.h>
+#include <stdlib.h>
+#include "periph_cpu.h"
+#include "periph/usbdev.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Detect the IP version based on the available register define */
+#if defined(USB_OTG_GCCFG_NOVBUSSENS)
+#define STM32_USB_OTG_CID_1x        /**< USB OTG FS version 0x00001200 */
+#elif defined(USB_OTG_GCCFG_VBDEN)
+#define STM32_USB_OTG_CID_2x        /**< USB OTG FS version 0x00002000 */
+#else
+#error Unknown USB peripheral version
+#endif
+
+/**
+ * @brief Buffer space available for endpoint TX/RX data
+ */
+#ifndef STM32_USB_OTG_BUF_SPACE
+#define STM32_USB_OTG_BUF_SPACE  USBDEV_EP_BUF_SPACE
+#endif
+
+/**
+ * @brief Number of endpoints available with the OTG FS peripheral
+ *        including the control endpoint
+ */
+#ifdef STM32_USB_OTG_CID_1x
+#define STM32_USB_OTG_FS_NUM_EP (4) /**< OTG FS with 4 endpoints */
+#elif defined(STM32_USB_OTG_CID_2x)
+#define STM32_USB_OTG_FS_NUM_EP (6) /**< OTG FS with 6 endpoints */
+#endif
+
+/**
+ * @brief Number of endpoints available with the OTG HS peripheral
+ *        including the control endpoint
+ */
+#ifdef STM32_USB_OTG_CID_1x
+#define STM32_USB_OTG_HS_NUM_EP (6) /**< OTG HS with 6 endpoints */
+#elif defined(STM32_USB_OTG_CID_2x)
+#define STM32_USB_OTG_HS_NUM_EP (9) /**< OTG HS with 9 endpoints */
+#endif
+
+/**
+ * @brief USB OTG FS FIFO reception buffer space in 32-bit words
+ *
+ * Used as shared FIFO for reception of all OUT transfers
+ *
+ * @note The application might have to increase this when dealing with large
+ *       isochronous transfers
+ */
+#ifndef STM32_USB_OTG_FS_RX_FIFO_SIZE
+#define STM32_USB_OTG_FS_RX_FIFO_SIZE   (128U)
+#endif
+
+/**
+ * @brief USB OTG HS FIFO reception buffer space in 32-bit words
+ *
+ * Used as shared FIFO for reception of all OUT transfers from the host
+ */
+#ifndef STM32_USB_OTG_HS_RX_FIFO_SIZE
+#define STM32_USB_OTG_HS_RX_FIFO_SIZE   (512U)
+#endif
+
+/**
+ * @brief Use the built-in DMA controller of the HS peripheral when possible
+ */
+#ifndef STM32_USB_OTG_HS_USE_DMA
+#ifdef STM32_USB_OTG_CID_1x
+/* FIXME: It should be possible to use DMA with the 1.x version of the  *
+ * peripheral, but somehow it doesn't work.                             */
+#define STM32_USB_OTG_HS_USE_DMA        (0)
+#else
+#define STM32_USB_OTG_HS_USE_DMA        (1)
+#endif
+#endif
+
+/**
+ * @brief stm32 USB OTG peripheral device context
+ */
+typedef struct {
+    usbdev_t usbdev;                            /**< Inherited usbdev struct */
+    const stm32_usb_otg_fshs_config_t *config;  /**< USB peripheral config   */
+    uint8_t buffer[STM32_USB_OTG_BUF_SPACE];    /**< Buffer space for endpoints */
+    size_t occupied;                            /**< Buffer space occupied */
+    size_t fifo_pos;                            /**< FIFO space occupied */
+    usbdev_ep_t *in;                            /**< In endpoints */
+    usbdev_ep_t *out;                           /**< Out endpoints */
+    bool suspend;                               /**< Suspend status */
+} stm32_usb_otg_fshs_t;
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* USBDEV_STM32_H */
+/** @} */