If memarray data is not initialized to 0 (for instance during a
re-init). The last element of the array is not properly cleared thus
leading to returning an invalid pointer when everything is allocated.
This removes the configuration parameters for mrf24j40 and enc28j60
drivers, which were present in the boards's Makefile.dep. There is
already documentation regarding how to correctly configure these devices
for the board.
We have to read the DR for every byte that we write.
Just reading DR while SPI is busy in a loop can lead to bytes being
left in the fifo, corrupting subsequent reads.
`netopt_state_t` is an enumeration type which is not necessarily 1 byte. If `uint8_t` is used, the cast `*((const netopt_state_t*) val` in `sx127x_netdev::_set`tries to read the real size, which can be more than the given length of 1 byte. Therefore, `netstat_opt_t` has to be used instead of `uint8_t`
The Nucleo-F103RB comes with an internal SWD programmer/debugger. Thus, the JTAG
pins are not going to be used for debugging / programming anyway. The pins are
exposed on the headers, so allowing them to be used as GPIOs make a lot of
sense.
The Bluepill / Blackpill boards only expose the SWD pins on the debug header,
but the JTAG pins (not also used by SWD) are exposed on the GPIO pin headers.
Hence, exposing them as regular GPIOs seems to be a reasonable choice.
- cpu/stm32f1: Removed previous code in gpio_init() to provide PB4 on the
Nucleo-F103RB only
- cpu/stm32_common: Introduced STM32F1_DISABLE_JTAG which, if defined in
board.h, exposes the JTAG only pins as GPIOs. This keeps the SWD pins, so that
SWD debugging remains possible
When an IRQ is lost during cc110x_send(), the driver will remain locked until
another IRQ is triggered. This commit changes the behavior to wait for at most
an reasonable upper bound, which is chosen to not only allow the driver to
recover but also (at least in theory) complete the transmission correctly.
The internal DC/DC converter is more efficient compared to the LDO
regulator. The downside of the DC/DC converter is that it requires an
external inductor to be present on the board. Enabling the DC/DC
converter is guarded with NRF5X_ENABLE_DCDC, this macro must be defined
if the DC/DC converter is to be enabled.
