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Commit Graph

170 Commits

Author SHA1 Message Date
Leandro Lanzieri
d7dbbb71ac
Merge pull request #14226 from benpicco/cpu/sam0_common/i2c_arbitrary_freqs
cpu/sam0_common: i2c: fix BAUD handling & cleanup
2020-08-04 14:49:10 +02:00
Benjamin Valentin
83a56ae666 cpu/sam0_common: merge RTC & RTT implementation
The RTC and RTT share the same peripheral, so they can also
share the same code.

This is needed to integrate the Tamper Detection into common
RTC/RTT code.
2020-07-31 22:00:09 +02:00
Benjamin Valentin
e1f84de6c5 cpu/sam0_common: UART: simplify init sequence
We don't need to read-modify-write the CTRLA register to disable
the UART.
The entire CTRLA register is re-written just a few lines below, so
we can just set it to 0 to disable the UART.

There is also no need to reset the UART since we re-write all config
registers in init.
2020-07-28 11:22:22 +02:00
Benjamin Valentin
28c1c502bc cpu/sam0_common: UART: implement arithmetic BAUD mode
SAMD20 does not implement a Fractional Baud mode, so we have to
implement Asynchronous Arithmetic mode.
2020-07-28 11:22:22 +02:00
Benjamin Valentin
e6f33fc436 cpu/sam0_common: uart: implement the periph_uart_reconfigure feature 2020-07-28 10:10:15 +02:00
Benjamin Valentin
62dbb21f19 cpu/sam0_common: UART move pin configuration to function
Makes the init code easier to read.
2020-07-28 10:10:15 +02:00
Benjamin Valentin
4df36cbfda cpu/sam0_common: i2c: improve readability of baud rate calculation
Use variables to represent fSCL an fGCLK to make the baud rate calculation
more readable.
2020-07-25 15:14:55 +02:00
Benjamin Valentin
2fb0d9061f cpu/sam0_common: i2c: fix High Speed 2020-07-25 15:14:55 +02:00
Benjamin Valentin
7269dc4e3a cpu/sam0_common: i2c: allow arbitrary I2C frequencies
The Atmel I2C peripheral supports arbitrary I2C frequencies.
Since the `i2c_speed_t` enum just encodes the raw frequency values,
we can just use them in the peripheral definition.

We just have to remove the switch-case block that will generate an error
for values outside of `i2c_speed_t`.
2020-07-25 15:14:55 +02:00
benpicco
30ebabb84e
Merge pull request #14007 from benpicco/cpu/sam0_common-pwm
cpu/sam0_common: move PWM to common code, add support for saml21, samd5x
2020-07-09 10:01:08 +02:00
Benjamin Valentin
bce7d25f10 cpu/sam0_common: add PWM support for saml2x, samd5x 2020-07-08 21:51:12 +02:00
Francisco
325b7a8d8e
Merge pull request #13631 from benpicco/cpu/sam0_common/spi-deinit
drivers/periph/spi: add periph_spi_reconfigure feature & implementation for sam0
2020-06-30 15:34:53 +02:00
Francisco
48bdd7018a
Merge pull request #14302 from fjmolinas/pr_sam0_rtt_opt
cpu/sam0_common/rt%: use READREQUEST when accessing CLOCK/COUNT regs
2020-06-24 08:42:03 +02:00
Bas Stottelaar
6774f7e412
Merge pull request #14337 from benpicco/TIMER_CHANNEL_NUMOF
use TIMER_CHANNEL_NUMOF instead of TIMER_CHANNELS
2020-06-24 01:19:17 +02:00
Benjamin Valentin
c8ff026640 cpu/sam0_common: use TIMER_CHANNEL_NUMOF 2020-06-24 00:45:35 +02:00
Francisco
a73b61e30b
Merge pull request #14320 from benpicco/cpu/sam0_common-gpio_gclk
cpu/sam0_common: GPIO always default to MAIN clock for EXTI, make configurable
2020-06-23 22:48:45 +02:00
Benjamin Valentin
3e91914831 cpu/sam0_common: spi: implement the periph_spi_reconfigure feature 2020-06-21 21:19:17 +02:00
Francisco Molina
bdda25c534
cpu/sam0_common/rt%: issue READREQUEST to access CLOCK/COUNT regs
read-synchronized register will stall immediatly when read, instead
issue READREQUEST and wait for sync to be unset.
2020-06-19 14:10:31 +02:00
Benjamin Valentin
c0203ad35c cpu/sam0_common: GPIO default to MAIN clock for EXTI, make configurable
Currently only samd21 used the 32 kHz clock for EXTI which makes it miss fast events.
All newer members of the family use the MAIN clock.

While touching this, also make the clock source configurable to this can be overwritten,
e.g. in the board config if desired.
2020-06-19 13:27:48 +02:00
Francisco
a970163812
Merge pull request #14312 from benpicco/cpu/sam0_common/periph/uart-rxonly
cpu/sam0_common: UART: allow RX only configuration
2020-06-19 11:44:10 +02:00
benpicco
c3314e1a0c
Merge pull request #14303 from fjmolinas/pr_sam0_unified_rtt
cpu/sam0: unified rtt configuration
2020-06-19 11:30:06 +02:00
Francisco Molina
ff24aa61f3
cpu/sam0_common/periph/rtt: uncrustify 2020-06-19 09:16:24 +02:00
Francisco Molina
15bbd95b6a
cpu/sam0_common/rtt: add configurable RTT_FREQUENCY 2020-06-19 09:16:24 +02:00
Benjamin Valentin
5c3ae77df9 cpu/sam0_common: UART: allow RX only configuration 2020-06-19 00:33:50 +02:00
Dylan Laduranty
6bf0a41399
Merge pull request #13600 from benpicco/sam0-gpio
cpu/sam0_common: GPIO IRQ optimizations
2020-06-17 21:23:19 +02:00
07c78efc83
Merge pull request #14285 from fjmolinas/pr_uart_nb_race
sam0/stm32: fix possible uart_nonblocking deadlock
2020-06-17 12:14:25 +02:00
Francisco Molina
80d682becd
cpu/sam0: avoid deadlock on nonblocking write
If a write to a full tsrb is attempted with disabled interrupts
or in a interrupt then a deadlock will occure. To avoid this make
space in the ringbuffer by synchronously writing to uart.
2020-06-17 10:01:21 +02:00
Francisco Molina
0b8adb2d27
cpu/sam0-stm32/uart: rename tx buf size to UART_TXBUF_SIZE 2020-06-17 10:01:20 +02:00
Benjamin Valentin
585dc15f99 cpu/sam0_common: UART: implement inverted RX & TX
The UART TX and TX lines on SAMD5x and SAML1x can be inverted.
However, the flags don't do exactly what one would expect.

See errata 2.18.5: SERCOM-UART: TXINV and RXINV Bits Reference:

> The TXINV and RXINV bits in the CTRLA register have inverted functionality.
>
> Workaround:
> In software interpret the TXINV bit as a functionality of RXINV, and conversely,
> interpret the RXINV bit as a functionality of TXINV.
2020-06-16 22:55:37 +02:00
benpicco
1992f57765
Merge pull request #14261 from bergzand/pr/sam0_common/spi_dma
sam0_common: Make SPI peripheral DMA compatible
2020-06-14 18:25:37 +02:00
60f4502e6c
cpu/sam0_common: Make SPI peripheral DMA compatible 2020-06-14 14:56:20 +02:00
22c8788b58
sam0_common/dma: Rename len to num 2020-06-14 11:51:36 +02:00
7a8566c391
sam0_common/dma: Mark src parameter as const 2020-06-13 21:02:04 +02:00
6be1b27bbb
sam0_common: Add DMA peripheral driver 2020-06-12 20:04:05 +02:00
Benjamin Valentin
824f7aa82b cpu/sam0_common: move PWM to common code 2020-06-07 16:50:17 +02:00
Leandro Lanzieri
079a7ee1e5
cpu/sam0_common: Add family specific Kconfig symbols 2020-06-02 17:42:10 +02:00
Benjamin Valentin
8486e8c6d1 cpu/sam0_common: implement timer_set_periodic() 2020-05-28 17:37:42 +02:00
Juergen Fitschen
df90176b1f cpu/sam0_common/spi: move clk pin muxing into spi_acquire / spi_release
When the SPI peripheral is disabled, the output lines will become HIGH-Z.
If the clk pin is not pulled HIGH or LOW, connected SPI slaves will start drawing current expectedly.
2020-05-23 13:54:39 +02:00
Benjamin Valentin
5481d8c73a cpu/sam0_common: clean up formatting
Make the code nicer to read.
2020-05-06 14:11:47 +02:00
Benjamin Valentin
e93c9a82f1 cpu/sam0_common: RTC INTFLAG are clear on write
Writing a 1 bit clears the interrupt flag, writing with |= is thus
uneccecary (and actually an error as this would clear *all* flags).

This cleanup was already done for rtt.c, but rtc.c missed out.
2020-05-06 14:05:12 +02:00
Francisco
cea0d1c532
Merge pull request #13421 from benpicco/cpu/sam0_common/i2c-deinit
drivers/periph/i2c: add periph_i2c_reconfigure feature & implementation for sam0
2020-05-05 19:09:47 +02:00
Benjamin Valentin
8c502322f4 cpu/sam0_common: i2c: implement the periph_i2c_reconfigure feature
This adds sam0 implementations for

 - i2c_init_pins()
 - i2c_deinit_pins()
 - i2c_pin_sda()
 - i2c_pin_scl()
2020-05-05 16:12:19 +02:00
benpicco
fbae0a1117
Merge pull request #13901 from benpicco/cpu/sam0_common/timer_flex_freq
cpu/sam0_common: timer: don't ignore frequency in timer_init()
2020-05-04 02:56:01 +02:00
Dylan Laduranty
76870721fe
Merge pull request #13965 from benpicco/cpu/sam0_common/periph/dac
cpu/sam0_common: implement periph/dac
2020-05-02 20:34:40 +02:00
Benjamin Valentin
bfb3d52a63 cpu/sam0_common: implement periph/dac
The sam0 MCUs all have a DAC peripheral.
The DAC has a resulution of 10 or 12 bits and can have one or two
output channels.

The output pins are always hard-wired to PA2 for DAC0 and PA5 for DAC1
if it exists.

On the same54-xpro I would only get a max value of ~1V when using the
internal reference, so I configured it to use an external voltage reference.

The external reference pin is hard-wired to PA3, so you'll have to connect
that to 3.3V to get results.
2020-05-02 18:31:55 +02:00
Benjamin Valentin
c05984b341 cpu/sam0_common: timer: don't ignore frequency in timer_init()
Now that we can query the GCLK frequency at run-time, there is no need
to implicitely hard-code the timer frequency in the config struct anymore.
2020-05-01 16:44:06 +02:00
fe299138aa
sam0_common: clarify memcpy in cpuid_get 2020-04-28 14:56:19 +02:00
Leandro Lanzieri
cf53a86308
cpu/sam0_common: Add CPU-specific WDT peripheral configuration 2020-03-31 13:39:39 +02:00
Leandro Lanzieri
00b71a2708
drivers/wdt: Move WDT_WARNING_PERIOD to 'CONFIG_' namespace 2020-03-31 13:39:37 +02:00
Dylan Laduranty
7a095a80d7 cpu/sam0: use generic hw fc module 2020-03-10 14:22:34 +01:00