5 Commits

Author	SHA1	Message	Date
Benjamin Valentin	41a5b7ef7a	core: change return type of irq_is_in(), irq_is_enabled() to bool ... This only cleans up the API, no change in behavior or users of the API is expected.	2021-12-08 15:53:15 +01:00
Jan Romann	3056b89252	cpu/riscv_common: uncrustify	2021-11-19 00:20:12 +01:00
Hauke Petersen	9a5edcf839	cpu/riscv: implement irq_is_enabled()	2021-08-25 08:01:05 +02:00
Koen Zandberg	48aa533639	cpu/riscv_common: Add CLIC peripheral driver ... The CLIC is a next generation interrupt controller for the RISC-V architecture. Co-authored-by:	2021-08-24 10:30:18 +02:00
Koen Zandberg	2692957c0e	riscv_common: Refactor common fe310 code to riscv_common	2021-02-05 09:32:19 +01:00