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cpu/riscv: implement irq_is_enabled()
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@ -97,6 +97,18 @@ static inline __attribute__((always_inline)) int irq_is_in(void)
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return riscv_in_isr;
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}
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static inline __attribute__((always_inline)) int irq_is_enabled(void)
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{
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unsigned state;
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__asm__ volatile (
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"csrr %[dest], mstatus"
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:[dest] "=r" (state)
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: /* no inputs */
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: "memory"
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);
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return (state & MSTATUS_MIE);
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}
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#ifdef __cplusplus
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}
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#endif
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