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Commit Graph

38 Commits

Author SHA1 Message Date
Dylan Laduranty
16f6a4bb93 cpu/samd21: avoid the use of bitfield
Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
2024-05-30 12:01:24 +02:00
Benjamin Valentin
124b849503 cpu: call early_init() 2023-01-08 22:26:12 +01:00
Benjamin Valentin
2c04d6cefe cpu/samd21: handle silicon errata
- The `periph_flashpage` driver expects the manual write bit to be set
   This should be set by default, but the SAM D20/SAM D21 errata sheets
   correct that this is indeed *not* set by default, which may cause
   spurious writes.

 - SAM D20 may not wake up from any sleep mode if sleep power reduction
   is enabled for the NVM block.
2022-06-09 18:27:30 +02:00
Jan Romann
4384795cb9
treewide: Remove excessive newlines 2021-08-13 19:50:38 +02:00
Benjamin Valentin
31b8dad147 cpu/samd21: add support for SAMD20 2021-01-12 15:48:39 +01:00
Benjamin Valentin
91604d0217 cpu/samd21: clean up 'disabled GCLK' magic
It turns out hooking up an unused peripheral to a disabled GCLK
leads to surprising power savings.

Name the GCLK to be more explicit (and since not all members of
the extended samd2x family have a GCLK7).

Turns out we can just use a non-existing GCLK ID for this, this
even saves us a real GCLK that we can use for something else.

Also make sure to disable *all* peripherals by using
`GCLK_CLKCTRL_ID_Msk` instead of relying on a magic value.

Looks like we previously missed some, since this leads to some
additional power savings:

master:     4.22 mA
this patch: 4.09 mA
2020-10-02 23:16:52 +02:00
5dc1d87f74
cpu/samd21: add DMA peripheral to init 2020-06-12 20:04:05 +02:00
Benjamin Valentin
895eb943d8 cpu/sam0_common: add cpu_pm_cb_enter()/leave()
This allows to implement needed work-arounds surrounding sleep on
a per-MCU basis.
2020-03-31 17:18:58 +02:00
Benjamin Valentin
51fa5afef7 cpu/samd21: default 1kHz clock to same source as 32kHz clock
The split between GEN2_ULP32K and GEN3_ULP32K was introduced to fix
a failure in tests/periph_wdt when the external oscillator was used.

By not running the external oscillator on demand, the failure can no
longer be observed, so default GEN3_ULP32K to GEN2_ULP32K.
2020-02-27 16:01:44 +01:00
Benjamin Valentin
2d7bc9e467 cpu/samd21: don't run XOSC32K on demand
This significantly reduces start-up time.
The XOSC32K is only configured when needed anyway.
2020-02-27 15:59:10 +01:00
Dylan Laduranty
03b6658721
Merge pull request #13313 from benpicco/samd21-asf
cpu/sam0_common: update samd21 vendor files to version 1.3.395
2020-02-11 21:50:56 +01:00
Benjamin Valentin
e03780c8ca cpu/sam0_common: update samd21 vendor files to version 1.3.395
This release adds EXTINT defines compatible with later versions of
the sam0 series of MCUs.
2020-02-08 03:28:14 +01:00
Francisco Molina
238d56e474
cpu/samd21/cpu: reset GCLK before configuring them 2020-02-07 16:11:42 +01:00
Francisco Molina
2e542a2488
cpu/samd21: cleanup XOSC32K initialization 2020-02-07 15:54:56 +01:00
Francisco Molina
9ab22b6926
cpu/samd21: add GEN3_ULP32K selector 2020-02-07 15:53:32 +01:00
Benjamin Valentin
38b6ee56f3 cpu/sam0: use defines for GCLK IDs
Give the clocks explicit names to better identify their meaning.
2020-02-04 21:16:54 +01:00
Benjamin Valentin
df33ffd0d3 cpu/samd21: only configure one 32kHz GCLK
Use the same 32 kHz GCLK to feed the PLL and the RTT, etc.
2020-02-04 21:16:54 +01:00
Benjamin Valentin
1496149bba cpu/sam0: don't hard-code peripheral clocks
Instead of hard-coding the peripheral clocks to CLOCK_CORECLOCK
introduce helper functions to return the frequency of the individual
GCLKs and use those for baud-rate calculations.

This requires the GCLK to be part of the peripheral's config struct.
While this is already the case for most peripherals, this also adds
it for those where it wasn't used before.

As it defaults to 0 (CLOCK_CORECLOCK) no change is to be expected.
2020-02-04 21:06:21 +01:00
Francois Berder
4a31f94cfc many typo fixes
Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
2019-11-23 22:39:07 +01:00
Benjamin Valentin
d92c079a90 cpu/samd21: configure GCLK4 with 1024 Hz
Both WDT and RTC expect a 1 kHz clock.
Source it from the same generator as the 32 kHz GCLK2.
2019-11-12 11:29:17 +01:00
Marian Buschsieweke
df27dbef7a
cpu: Moved stdio_init() into cpu_init()
- Removed stdio_init() from newlib's _init(), as this is too late in the boot
  process to allow DEBUG()ing during periph_init()
- Added stdio_init() to the various cpu_init() routines of the ARM CPUs just
  before periph_init()
2019-09-06 16:54:23 +02:00
Benjamin Valentin
d6b8df1ff7 cpu/samd21: allow to use XOSC32K for GCLK2
GCLK2 is needed by RTC/RTT, so make it possible to configure it with
XOSC32K as source.
2019-06-18 13:20:04 +02:00
Dan Evans
0f011d53de samd21/cpu DFLL lock loop error 2018-01-26 09:59:59 -07:00
Dan Evans
354803110d samd21:DFLL bug 2017-07-13 13:09:42 -06:00
Dan Evans
08224bd85a samd21/clock: add xosc32/DFLL option 2017-06-26 10:42:23 -06:00
Dan Evans
7a8551574b samd21/cpu:waitstates for low voltage 2017-05-12 14:13:09 -07:00
dylad
2b1a1e70c3 cpu/samd21: fix NVM wait states
Signed-off-by: dylad <dylan.laduranty@mesotic.com>
2017-04-12 20:23:51 +02:00
Hauke Petersen
4bfce892d3 drivers/periph&cpu: add and use common periph_init() 2017-01-25 16:46:46 +01:00
Hauke Petersen
ea07a6817c cpu/sam0+boards: adapted to new SPI API
- adapted the SPI driver
- merged SPI driver for samr21 and saml21
- adapted all boards using the CPU
2017-01-25 16:46:45 +01:00
f42e5381ee cpu: samd21: add periph/pm support 2017-01-12 16:26:01 +01:00
Kees Bakker
88e84f68ff cpu/sam21_common: update ASF CMSIS (samr21) include files using ASF 3.21
Notice that RIOT was using FDPLL96M, which is indeed the name in the
datasheet. But Atmel is using GCLK_GENCTRL_SRC_FDPLL.
2016-09-21 19:43:30 +02:00
Joakim Nohlgård
2ea2cdc9e1 cpu/samd21: Use {} notation for empty while loops 2016-03-03 16:31:28 +01:00
daniel-k
0b6da4609e samd21: tidy up peripheral clocks and fix potential bugs in pwm and i2c clocks 2015-09-29 18:49:46 +02:00
1172597594 cpu: samd21: fix synchronization loop in clk_init 2015-06-15 21:33:13 +02:00
Hauke Petersen
164721657d cpu/samd21: added cpu clock configuration
- choosable between PLL and internal 8MHz osciallator
- configurable to a wide range of frequencies
2015-06-04 11:58:26 +02:00
Hauke Petersen
dfb717c308 cpu/samd21: adapted to centralized cpu conf 2015-05-29 16:44:52 +02:00
Joakim Gebart
13832d8e62 everything: Remove filename from @file Doxygen command 2015-05-22 07:34:41 +02:00
Thomas Eichinger
bf256f63a3 samr21-xpro: initial import for the samr21-xpro board 2014-09-25 14:37:47 +02:00