GCC 12 gives out of bounds warnings when the resulting address is out
of bounds of what GCC assumes to be the valid address space. It seems
that by default the address 0x0 is not considered valid (which would
be a NULL pointer and typically not mapped in a userspace behind an MMU
scenario), but in fact is valid on bare metal hardware. At least on
AVR and MSP430 this needs to be set. On many Cortex M MCUs 0x0 is also
a valid address (e.g. often the flash is mapped there), but seemingly
for them `--param=min-pagesize=0` is already the default. In any case,
it won't hurt to set it explicit for them as well.
An `INSERT AFTER` directive no longer can refer to a different linker
script included with `-T path/to/script.ld`. Instead, this adds wrapper
linker scripts that just `INCLUDE` the three individual linker scripts.
This way, the xfa.ld can safely refer back to sections defined in
the vendor linker script.
For some reason, this approach cause the exact issue it fixes for
binutils 2.40 with the binutils in the CI. We stick with the old
linker flags with binutils prior 2.40 to be compatible with both
conflicting behaviors.
The best approach would be to come up with something that works across
different versions of binutils; but no such solution materialized.
With RISC-V being a relatively young toolchain, a lot of inconsistencies
between different toolchains are to be found that differ in the target
triple and the flags supported. This build system performs run-time
tests to detect the toolchain and supported flags.
With `BUILD_IN_DOCKER=1` issues arise, as this checks are performed
outside of the docker container. However, the host may have no RISC-V
toolchain installed or a different toolchain, so there is little reason
in performing this detection then. Instead, a hard coded target triple
and supported flags are provided when using `BUILD_IN_DOCKER=1`.
Use -misa-spec=2.2 on newer toolchains, which allows passing the same
-march value to both the linker and the compiler even when binutils and
GCC support difference ISA specs.
A backward incompatible change in the RISC-V resulting in instructions
previously included by rv32imac to only be available with
rv32imac_zicsr. All RISC-V CPUs supported by RIOT are hence either
considered as rv32imac (from the old ISA spec point of view) or as
rv32imac_zicsr (from the new ISA spec point of view). This adds a
simple test if GCC understands rv32imac_zicsr and uses it then as march,
but uses rv32imac as march if not.
This flag disables all builtin functions provided by the compiler as
well as disabling all optimizations and error checking related to
standard C library functions. If you're using a C library which
conforms to the ANSI C standard, you want to leave these compiler
features enabled.
Signed-off-by: Keith Packard <keithp@keithp.com>
For RISC-V and Cortex-M-not-3, triples are known and have worked in some
configuration, but do not work at the moment and stay disabled until the
reference platforms (native, M3) have been established well.
The xfa.ld script is incompatible with binutils > 2.35.2 and results
in firmwares that wont boot. Sadly, I couldn't figure out an elegant
way to fix the issue. Instead, I modified the linker script provided
by binutils to also include XFA.
Introduce XMEGA EBI driver. This enable EBI for use with all memory
supported by the device and peripherals. It include support to SRAM,
SDRAM, LCDs or any other external bus access.
Note: This feature only works for A1/A1U series, which are, the series
with EBI hardware.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current script doesn't allow change script path and name.
Add LDSCRIPT_COMPAT_PATH and LDSCRIPT_COMPAT_NAME default
values to allow a unique path inside atxmega folder.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Atmel AVR-8 CPU was reworked to accomodate variants like ATxmega.
This rename to atmega.inc.mk to avr8.inc.mk to be compliant with
new directory structure.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This requires -nostartfiles to be only passed to the linker, not the
compiler, as it is a linker flag and passing it to the compiler causes a
clang warning to be emitted.
Additionally, clang does not seem to support `-mcmodel=medlow` and
`-msmall-data-limit=8` but these options do not seem strictly necessary
to me anyhow thus they are deactivated conditionally when using clang.
Split out Gunar Schorcht's clever approach to provide thread safe malloc for
AVR into a system module and make AVR depend on this. This allows other
platforms to also use this.
Use riscv-none-elf instead of legacy riscv-none-embed as target triplet for
RISC-V development. However, if ricsv-none-elf is not present, try
riscv64-unknown-elf and riscv-none-embed instead. If the legacy riscv-none-embed
is used, a warning is printed.
Add `TARGET_ARCH_<ARCH>` for each architecture (e.g. `TARGET_ARCH_CORTEX` for
Cortex M) to allow users to overwrite the target triple for a specific arch
from ~/.profile or ~/.bashrc (or the like) without overwriting it for all others
as well.
