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Commit Graph

122 Commits

Author SHA1 Message Date
hugues
323725bcf5 cpu/stm32/periph/adc_f4: removes ADC configuration loading 2020-08-27 03:56:26 +02:00
hugues
3921a2f925 cpu/stm32/periph/adc_l1: removes ADC configuration loading 2020-08-27 03:56:26 +02:00
077a43948b
Merge pull request #14849 from hugueslarrive/max_adc_speed
cpu/stm32/periph/adc: remove MAX_ADC_SPEED from implementations where it is not used
2020-08-26 15:31:19 +02:00
hugues
629a5af8ed cpu/stm32/periph/adc_f0: remove unused MAX_ADC_SPEED 2020-08-25 17:16:49 +02:00
hugues
205ae92b84 cpu/stm32/periph/adc_l0: remove unused MAX_ADC_SPEED 2020-08-25 17:15:39 +02:00
hugues
c519149979 cpu/stm32/periph/adc_l1: remove unused MAX_ADC_SPEED 2020-08-25 17:14:55 +02:00
a1038aa70e
cpu: boards: stm32g4: improve clock configuration 2020-08-25 12:55:16 +02:00
84bbee784d
cpu/stm32: add transition phase when raising +80MHz clock 2020-08-24 15:42:13 +02:00
b4aa2dae3e
cpu/stm32: remove MPU feature from stm32l052t8 2020-08-21 15:25:26 +02:00
fd71e09b69
cpu/stm32: disable MPU for stm32g0
MPU is broken on cortex-m0+ in the current state
2020-08-21 14:56:47 +02:00
5fab8f7a9a
stm32: Add define for when DMA channel selection is not supported
This adds a placeholder define for when the DMA peripheral available on
the MCU doesn't support channel/trigger filtering. This is the case on
the stm32f1 and stm32f3 family.
2020-08-19 16:09:55 +02:00
Francisco
4dce666435
Merge pull request #14764 from hugueslarrive/cpu/stm32/periph/dma
cpu/stm32/periph/dma: add support for STM32F3
2020-08-19 12:53:35 +02:00
hugues
d06aa3cd63 cpu/stm32/periph/dma: add support for STM32F3 2020-08-19 11:26:04 +02:00
hugues
2f0ac9e820 cpu/stm32/periph/spi: use dma_stop for STM32s that need it 2020-08-19 11:25:34 +02:00
Francisco
cc954274a7
Merge pull request #14763 from hugueslarrive/cpu/stm32/vectors/vectors_f3
cpu/stm32/vectors/vectors_f3: a small fix for STM32F334x8
2020-08-19 10:08:31 +02:00
benpicco
4a2d867339
Merge pull request #14749 from bergzand/pr/stm32/dynamic_spi_freqs
stm32: Add support for arbitrary SPI clock rates
2020-08-18 17:57:30 +02:00
9d49a30560
stm32: Remove obsolete spi_divtable tool 2020-08-18 16:55:01 +02:00
b9d62e47d3
stm32: Add support for arbitrary SPI clock rates 2020-08-18 16:55:01 +02:00
Francisco Molina
14d4d2aacb
cpu/stm32/f1/rtt: don't trigger callbacks if unset 2020-08-18 14:10:15 +02:00
Francisco Molina
0d60b3370a
cpu/stm32/f1/rtt: some fixes to rtt_set_alarm
- disable alarm before setting a new one
- save cb and argument context before enabling the ISR
2020-08-18 13:43:10 +02:00
benpicco
22d3bf7c51
Merge pull request #14594 from maribu/stm32-eth-cleanup
cpu/stm32: Clean up / fix periph_eth
2020-08-17 21:16:27 +02:00
Marian Buschsieweke
4fcf37c162
cpu/stm32/periph_eth: Handle lost & spurious IRQs
Fixes https://github.com/RIOT-OS/RIOT/issues/13496
2020-08-17 20:30:16 +02:00
Marian Buschsieweke
8d8af31e39
driver/stm32_eth: Integrate into periph_eth
The stm32_eth driver was build on top of the internal API periph_eth, which
was unused anywhere. (Additionally, with two obscure exceptions, no functions
where declared in headers, making them pretty hard to use anyway.)

The separation of the driver into two layers incurs overhead, but does not
result in cleaner structure or reuse of code. Thus, this artificial separation
was dropped.
2020-08-17 20:29:33 +02:00
Marian Buschsieweke
28ed07d6e3
cpu/stm32/periph_eth: zero-copy TX (-6 KiB RAM)
The Ethernet DMA is capable of collecting a frame from multiple chunks, just
like the send function of the netdev interface passes. The send function was
rewritten to just set up the Ethernet DMA up to collect the outgoing frame
while sending. As a result, the send function blocks until the frame is
sent to keep control over the buffers.

This frees 6 KiB of RAM previously used for TX buffers.
2020-08-17 20:29:33 +02:00
Marian Buschsieweke
51fe77afa4
cpu/stm32/periph_eth: configurable buffer size
1. Move buffer configuration from boards to cpu/stm32
2. Allow overwriting buffer configuration
    - If the default configuration ever needs touching, this will be due to a
      use case and should be done by the application rather than the board
3. Reduce default RX buffer size
    - Now that handling of frames split up into multiple DMA descriptors works,
      we can make use of this

Note: With the significantly smaller RX buffers the driver will now perform
much worse when receiving data at maximum throughput. But as long as frames
are small (which is to be expected for IoT or boarder gateway scenarios) the
performance should not be affected.
2020-08-17 20:29:29 +02:00
Marian Buschsieweke
932c311ee2
cpu/stm32/periph_eth: Fix RX logic
If any incoming frame is bigger than a single DMA buffer, the Ethernet DMA will
split the content and use multiple DMA buffers instead. But only the DMA
descriptor of the last Ethernet frame segment will contain the frame length.

Previously, the frame length calculation, reassembly of the frame, and the
freeing of DMA descriptors was completely broken and only worked in case the
received frame was small enough to fit into one DMA buffer. This is now fixed,
so that smaller DMA buffers can safely be used now.

Additionally the interface was simplified: Previously two receive flavors were
implemented, with only one ever being used. None of those function was
public due to missing declarations in headers. The unused interface was
dropped and the remaining was streamlined to better fit the use case.
2020-08-17 20:28:49 +02:00
hugues
7b3b10303b cpu/stm32/vectors/vectors_f3: a small fix for STM32F334x8 2020-08-14 14:03:10 +02:00
benpicco
ea42705637
Merge pull request #14564 from benpicco/cpu/stm32-bitarithm_test_and_clear
cpu/stm32: GPIO: use bitarithm_test_and_clear()
2020-08-11 14:05:38 +02:00
Marian Buschsieweke
7d9aed7f66
Merge pull request #14391 from benpicco/cpu/stm32-timer_periodic
cpu/stm32: implement periph_timer_periodic
2020-08-10 07:58:27 +02:00
Benjamin Valentin
a0972c9e0c cpu/stm32: implement periph_timer_periodic
Seems like the Interrupt flag for a Capture/Compare channel gets set when

- the CC-value is reached
- the timer resets before the CC value is reached.

We only want the first event and ignore the second one. Unfortunately I did
not find a way to disable the second event type, so it is filtered in software.

That is we need to

 - ignore the CC-interrupts when the COUNT register register is reset
 - ignore the CC-interrupts > TOP value/ARR (auto-reload register)
2020-08-09 22:55:22 +02:00
Marian Buschsieweke
234a720571
Merge pull request #14516 from benpicco/bitband_hw
cortexm_common: fix check for bitbanding feature
2020-08-08 14:26:49 +02:00
Benjamin Valentin
97bf000bcd cpu/stm32: use RIOT_EPOCH 2020-08-07 17:39:25 +02:00
Benjamin Valentin
9970c57cdf cpu/stm32: GPIO: use bitarithm_test_and_clear() 2020-07-28 12:43:24 +02:00
millotp
69858916c7 boards: enable CAN bus on nucleo-f446re & nucleo-f446ze
Changed the pinout for the CAN bus:
CAN RX: PB8
CAN TX: PB9

And added periph_can to FEATURES_PROVIDED and to Kconfig files
2020-07-27 14:36:29 +02:00
Marian Buschsieweke
53375f04bf
cpu/stm32/periph_eth: Optimize / fix flush
- Added missing wait for TX flush
- Grouped access to the same registers of the Ethernet PHY to reduce accesses.
  (The compiler won't optimize accesses to `volatile`, as defined in the C
  standard.)
2020-07-26 22:12:03 +02:00
Marian Buschsieweke
a5dbec33d9
cpu/stm32/periph_eth: Cleanup & fix DMA descriptor
- Add missing `volatile` to DMA descriptor, as memory is also accessed by the
  DMA without knowledge of the compiler
- Dropped `__attribute__((packed))` from DMA descriptor
    - The DMA descriptor fields need to be aligned on word boundries to
      properly function
    - The compiler can now more efficiently access the fields (safes ~300 B ROM)
- Moved the DMA descriptor struct and the flags to `periph_cpu.h`
    - This allows Doxygen documentation being build for it
    - Those types and fields are needed for a future PTP implementation
- Renamed DMA descriptor flags
    - They now reflect to which field in the DMA descriptor they refer to, so
      that confusion is avoided
- Added documentation to the DMA descriptor and the corresponding flags
2020-07-26 22:12:03 +02:00
42eb044ec6
Merge pull request #14482 from hugueslarrive/cpu/stm32/periph/pwm
cpu/stm32/periph/pwm: some bugfixes...
2020-07-24 21:05:57 +02:00
Gunar Schorcht
044d08d599 cpu/stm32: GPIO ports definition fix
The available GPIO ports may also differ within a family. Therefore, the vendor definitions GPIO* are used instad of CPU_FAM_STM definitions to determine which ports are available for a certain MCU.
2020-07-22 09:13:52 +02:00
dada52ecd2
cpu/stm32: add stm32g0 support 2020-07-21 12:45:25 +02:00
dea506a719
cpu/stm32wb: define missing IMR bit in CMSIS 2020-07-16 17:35:50 +02:00
1a095b36fa
cpu/stm32: adapt UART driver for stm32l4r5 cpu line 2020-07-16 17:35:49 +02:00
8e87dedbce
cpu/stm32: remove not needed CMSIS vendor headers 2020-07-16 17:35:49 +02:00
f21440b176
cpu/stm32: use CMSIS headers from the stm32cmsis package 2020-07-16 17:35:48 +02:00
Benjamin Valentin
8f36c88b93 cpu/stm32: set CPU_HAS_BITBAND 2020-07-16 14:44:28 +02:00
8046a74e50
cpu/stm32: model features in Kconfig 2020-07-16 11:34:02 +02:00
055c43c878
cpu/stm32: enable flashpage feature for stm32f031k6 2020-07-16 11:15:30 +02:00
Marian Buschsieweke
aec9eb7f6a
cpu/stm32: Fix uart_init()
- Make use of the fact that gpio_init_af() does not need prior call to
  gpio_init() for all STM32 families anymore and drop call to gpio_init()
- Initialize the UART periph first, before initializing the pins
    - While uninitialized, the UART periph will send signal LOW to TXD. This
      results in a start bit being picked up by the other side.
    - Instead, we do not connect the UART periph to the pins until it is
      initialized, so that the TXD level will already be HIGH when the pins
      are attached.
    - This results in no more garbage being send during initialization
2020-07-15 12:12:46 +02:00
Marian Buschsieweke
73c9161517
cpu/stm32: Fix gpio_init() / gpio_int_af()
- Do not set an intermediate mode, prepare correct mode settings in a temporary
  variable
- Consistently enabled the GPIO periph in gpio_init_af()
    - Previously, STM32 F1 did not require a separate call to gpio_init() prior
      to a call of gpio_init_af(), but other STM32 families did
    - Now, gpio_init_af() can be used without gpio_init() consistently
- STM32 F1: Do not touch ODR for non input pins
    - For input pins, this enables / disabled pull up resistors. For outputs,
      this register should remain untouched (according to API doc)
2020-07-15 12:12:45 +02:00
hugues
0926a04b08 cpu/stm32/periph/pwm: useless static var and a semicolon removed 2020-07-14 01:41:16 +02:00
Gilles DOFFE
892370121d
cpu/stm32/qdec: test null callback pointer (#14125)
cpu/stm32/qdec: test if callback pointer is set

Callback pointer is not tested and could result in a hard fault
if the pointer is NULL.
Thus only activate interrupt if a callback provided.

Signed-off-by: Gilles DOFFE <g.doffe@gmail.com>
2020-07-10 15:05:53 +02:00