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Commit Graph

17 Commits

Author SHA1 Message Date
Hauke Petersen
3a00fe8e49 cpus: make use of cortexm_isr_end() 2016-12-21 11:28:46 +01:00
Pieter Willemsen
a0835ccb1d stm32: use periph_clk_en/dis functions for clock changes 2016-12-16 15:01:56 +01:00
Hauke Petersen
84880c1f3c cpu/stm32f0: adapted GPIO driver 2016-03-17 14:40:48 +01:00
botmayank
35154e0c84 cpu/stm32f0: GPIO enable IRQ for EXTI0_1
Removed unnecessary EXTI2_3 interrupt enable

cpu/stm32f0: gpio removed trailing whitespace
2016-03-07 14:18:39 +01:00
DipSwitch
df996044e2 STM32 GPIO: Fix exti_isr handling to only call callbacks of lines with have there interrupt enabled 2016-02-21 09:43:42 +01:00
Hauke Petersen
cfac198fc8 cpu/stm32f0: added gpio_init_analog() 2016-02-13 13:06:58 +01:00
Hauke Petersen
b97afdc1b1 cpu/stm32f0: some minor fixes to GPIO driver
- fixed indention on some places
- s/gpio_config/isr_ctx/
- use BRR reg for clearing pin
2016-02-13 13:02:32 +01:00
MohmadAyman
f881874bbb cpu/stm32f0: optimized GPIO driver implementation 2016-02-12 07:01:20 +02:00
Hauke Petersen
975e027360 cpu: use Hauke's correct email address 2016-02-09 16:09:40 +01:00
Hauke Petersen
ad0abdcadd cpus: use default isr_ctx struct in GPIO drivers 2016-01-27 17:00:37 +01:00
Hauke Petersen
f9bb383118 cpu/stm32f0: adjusted to changed GPIO interface 2015-06-12 19:10:49 +02:00
Hauke Petersen
ec17730c38 cpu/stm32f0: fixed gpio interrupt routines
- guarded calls in case no interrupt is defined
- eneabled detection of multiple, simoultaneous events
2015-03-13 15:32:48 +01:00
Hauke Petersen
3976554f12 cpu/stm32f0: fixed port clk en for GPIO driver 2015-01-21 08:14:31 +01:00
Hauke Petersen
13a417d02a cpu/stm32f0: optimized GPIO driver implementation 2014-10-31 14:00:46 +01:00
Hauke Petersen
e7fbaf3815 cpu: removed NAKED attribute from ISRs
- removed the __attribute__((naked)) from ISRs
- removed ISR_ENTER() and ISR_EXIT() macros

Rationale: Cortex-Mx MCUs save registers R0-R4 automatically
on calling ISRs. The naked attribute tells the compiler not
to save any other registers. This is fine, as long as the
code in the ISR is not nested. If nested, it will use also
R4 and R5, which will then lead to currupted registers on
exit of the ISR. Removing the naked will fix this.
2014-10-30 19:33:32 +01:00
Hauke Petersen
13894fa70c cpus: adjusted uart implementations for changed IF
- adjusted stm32f0
- adjusted stm32f3
- adjusted stm32f4
- adjusted sam3x8e
- adjusted nrf51822
2014-08-15 12:23:39 +02:00
Hauke Petersen
7904af1ac5 cpu: Initial import of stm32f0 2014-07-16 15:21:28 +02:00