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Commit Graph

43598 Commits

Author SHA1 Message Date
1dc6e0e32b
drivers/nrf24l01p: model in Kconfig 2023-05-24 10:18:53 +02:00
bors[bot]
40d0f64a04
Merge #19549 #19608 #19657
19549: pkg/littlefs2: bump version to 2.6 r=benpicco a=benpicco




19608: build system: fix `make compile-commands BUILD_IN_DOCKER=1` r=benpicco a=maribu

### Contribution description

Just run `make compile-commands` outside of docker, as the compile commands generated in the docker container won't be helpful for tools outside of the container anyway.


19657: drivers/mpu9x50: clean up code r=benpicco a=maribu

### Contribution description

Avoid using floating point arithmetic and some minor cleanups.


Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-05-23 23:35:57 +00:00
bors[bot]
7e75fdf2c5
Merge #19620
19620: dist/tools/openocd: fix parsing of flash bank base r=aabadie a=maribu

### Contribution description

Since [80fc9fabc66a0bc767467fa14c703e5a9f340cd3] the format of the `flash list` command changed to a more human readable multi-line variant. Technically, the change is white-space only. Still, the current approach of parsing them with awk, sed and cut doesn't like the new multi-line format. The parsing is now delegated into a python script that is compatible across OpenOCD versions.

[80fc9fabc66a0bc767467fa14c703e5a9f340cd3]: 80fc9fabc6


Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-05-23 23:08:27 +00:00
Benjamin Valentin
d475c97692 pkg/littlefs2: bump version to 2.6
This release bumps the on-disk minor version of littlefs from lfs2.0 -> lfs2.1.

This change is backwards-compatible, but after the first write with the new version,
the image on disk will no longer be mountable by older versions of littlefs.
2023-05-23 22:38:56 +02:00
bors[bot]
a272abb15d
Merge #19618 #19639 #19644 #19649 #19656
19618: cpu/stm32: fix riotboot settings for L4 and WB r=benpicco a=gschorcht

### Contribution description

This PR fixes the `riotboot` configuration for L4 and WB.

The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work at all. Furthermore, a minimum `RIOTBOOT_LEN` of `0x2000` is required for L4.

Found when investigating the compilation errors for `bootloaders/riotboot_serial` in PR #19576.

### Testing procedure

1. Green CI.
2. Use the following commands:
    ```
    BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN
    BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_HDR_LEN
    ```
    In master these commands give
    ```
    0x400
    ```
    With this PR these commands give
    ```
    0x200
    ```
    as expected.
3. Use the following commands:
    ```
    BOARD=nucleo-l496zg make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN
    BOARD=p-nucleo-wb55 make -C tests/riotboot info-debug-variable-RIOTBOOT_LEN
    ```
    In master these commands give
    ```
    0x1000
    ```
    With this PR these commands give
    ```
    0x2000
    ```
    as expected.

### Issues/PRs references


19639: tests/net/gnrc_mac_timeout: add automated test r=aabadie a=aabadie



19644: gnrc_ipv6_nib: include RIO with all subnets in downstream RA r=benpicco a=benpicco



19649: gnrc_sixlowpan_iphc: prefix bits outside context must be zero r=benpicco a=benpicco



19656: gnrc/ipv6_auto_subnets: allow to configure minimal prefix length r=benpicco a=benpicco



Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Alexandre Abadie <alexandre.abadie@inria.fr>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-05-23 20:02:58 +00:00
Marian Buschsieweke
533af18119
drivers/mpu9x50: clean up code
Avoid using floating point arithmetic and some minor cleanups.
2023-05-23 21:40:40 +02:00
bors[bot]
3469fce248
Merge #19335 #19581 #19612 #19643 #19655
19335: ipv6/nib: 6LBR should not send RS on their downstream interface r=fabian18 a=fabian18



19581: cpu/samd5x: enable FDPLL1 at 200MHz r=benpicco a=dylad

### Contribution description

This PR allows to use the second FDPLL (the first one is used to generated the 120MHz frequency used by the core and some peripherals). The second FDPLL is setup to run at 200MHz which is the maximum allowed by this MCU.
In fact, I reused the existing function which setup FDPLL0 so it can be used in a generic way for both PLL (since they are the same IP).

I change the way the computation offset (left shift by 5)  is done because 200MHz << 5 wouldn't fit inside an `uint32_t` and I wanted to avoid using an `uint64_t` here

Two additional commits are present for a small cleanup and a fix.

This is currently unused in our codebase, so it shouldn't impact this platform too much as the `ONDEMAND` bit is set. the FDPLL will not be running out of the box. But `@gschorcht` might need it pretty soon.

### Testing procedure

This PR can be tested on a `same54-xpro` and an oscilloscope using the following the patch:
```
From 76490845ec72387b24116bdd364a61365c186aa1 Mon Sep 17 00:00:00 2001
From: Dylan Laduranty <dylan.laduranty@mesotic.com>
Date: Thu, 11 May 2023 17:42:16 +0200
Subject: [PATCH] removeme! for debug purpose

Signed-off-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
---
 cpu/samd5x/cpu.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/cpu/samd5x/cpu.c b/cpu/samd5x/cpu.c
index f778991a5b..2866c8c9e5 100644
--- a/cpu/samd5x/cpu.c
+++ b/cpu/samd5x/cpu.c
`@@` -220,7 +220,7 `@@` static void fdpll_init(uint8_t idx, uint32_t f_cpu)
 }
 
 static void gclk_connect(uint8_t id, uint8_t src, uint32_t flags) {
-    GCLK->GENCTRL[id].reg = GCLK_GENCTRL_SRC(src) | GCLK_GENCTRL_GENEN | flags | GCLK_GENCTRL_IDC;
+    GCLK->GENCTRL[id].reg = GCLK_GENCTRL_SRC(src) | GCLK_GENCTRL_GENEN | flags | GCLK_GENCTRL_OE | GCLK_GENCTRL_IDC;
     while (GCLK->SYNCBUSY.reg & GCLK_SYNCBUSY_GENCTRL(id)) {}
 }
 
`@@` -384,6 +384,12 `@@` void cpu_init(void)
     dma_init();
 #endif
 
+    sam0_gclk_enable(SAM0_GCLK_200MHZ);
+    /* output both FDPLL (GCLK0 and GCLK4) to gpios */
+    gpio_init_mux(GPIO_PIN(PB, 14), GPIO_MUX_M);
+    gpio_init_mux(GPIO_PIN(PB, 10), GPIO_MUX_M);
+    /* PB14 -> EXT2    PB10 -> QSPI SCK */
+
     /* initialize stdio prior to periph_init() to allow use of DEBUG() there */
     early_init();
 
-- 
2.35.3
```

It will output both FDPLLs to PB14 and PB10. Their frequency can then be measured using an oscilloscope.


### Issues/PRs references
None.

19612: pkg/ndn-riot: drop unmaintained pkg r=benpicco a=maribu

### Contribution description

Upstream [1] has seen no activity since 2018, so it safe to assume this is dead. It is reasonable to assume that any users - if there ever were any - have moved on.

Fixes https://github.com/RIOT-OS/RIOT/issues/15638

[1]: https://github.com/named-data-iot/ndn-riot


19643: examples/suit_update: some test fixes r=aabadie a=kaspar030



19655: net/ipv6: make use of clz in ipv6_addr_match_prefix() r=benpicco a=benpicco



Co-authored-by: Fabian Hüßler <fabian.huessler@st.ovgu.de>
Co-authored-by: Dylan Laduranty <dylan.laduranty@mesotic.com>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Co-authored-by: Kaspar Schleiser <kaspar@schleiser.de>
Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-05-23 16:23:19 +00:00
Gunar Schorcht
e6c1aec7d0 cpu/stm32: fix riotboot settings for L4 and WB
The family is not called `stm32l4` or `stm32wb` but `l4` and `wb`. That is, the `riotboot` configuration didn't work. A minimum `RIOTBOOT_LEN` of `0x2000` is required for WB.
2023-05-23 17:47:04 +02:00
Benjamin Valentin
2a7691176b gnrc/ipv6_auto_subnets: allow to configure minimal prefix length 2023-05-23 17:46:39 +02:00
Benjamin Valentin
9358a4430d gnrc/ipv6_auto_subnets: remove superfluous newline 2023-05-23 17:46:39 +02:00
Benjamin Valentin
0ee46e8d42 core/compiler_hints: add may_be_zero() 2023-05-23 17:46:39 +02:00
Benjamin Valentin
771e9e9a14 gnrc/ipv6_auto_subnets: remove superfluous newline 2023-05-23 16:48:17 +02:00
Benjamin Valentin
41f9c2593d gnrc_ipv6_nib: include RIO with all subnets in downstream RA 2023-05-23 16:46:41 +02:00
Benjamin Valentin
d8438c47cf net/ipv6: make use of bitarithm_clzb() in ipv6_addr_match_prefix() 2023-05-23 16:15:25 +02:00
Benjamin Valentin
abe5949cd2 core/bitarithm: add bitarithm_clzb() 2023-05-23 16:15:25 +02:00
Fabian Hüßler
e0d64b1a38 ipv6/nib: 6LBR should not send RS on their downstream interface 2023-05-23 15:44:48 +02:00
Benjamin Valentin
7e9308dd8c gnrc_sixlowpan_iphc: prefix bits outside context must be zero 2023-05-23 14:16:47 +02:00
bors[bot]
4c27aff295
Merge #19652
19652: gnrc_ipv6_nib: set default RIO preference to zero r=fabian18 a=benpicco



Co-authored-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2023-05-23 11:50:43 +00:00
Benjamin Valentin
8966c14f60 gnrc_ipv6_nib: set default RIO preference to zero
Linux will ignore RIOs with preference NONE, so set the preference
to zero instead.
2023-05-23 13:02:36 +02:00
bors[bot]
8408d69ea8
Merge #19602
19602: dist/tools/compile_commands: add another workaround r=chrysn a=maribu

### Contribution description

Filter out GCC only `--param=min-pagesize=0` in `clangd` mode. This fixes compilation of rust applications, that now fails with:

    thread 'main' panicked at 'Unable to generate bindings: ClangDiagnostic("error: argument unused during compilation: '--param=min-pagesize=0' [-Wunused-command-line-argument]\n")', /home/maribu/.cargo/git/checkouts/rust-riot-sys-d12733b89271907c/b4bd4bd/build.rs:224:10


Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-05-23 10:44:46 +00:00
bors[bot]
f3150120f7
Merge #17425
17425: cpu/rpx0xx: initial PIO support r=maribu a=fabian18



Co-authored-by: Fabian Hüßler <fabian.huessler@st.ovgu.de>
2023-05-23 07:02:45 +00:00
Fabian Hüßler
13522d4ee5 dist/tools: fix compilation of elf2uf2 2023-05-23 08:49:37 +02:00
Fabian Hüßler
e69a0bea07 makefiles: add makefile to generate header file from PIO program 2023-05-23 08:49:37 +02:00
Fabian Hüßler
20069c2305 examples/pio_blink: Add PIO blink example 2023-05-23 08:49:37 +02:00
Fabian Hüßler
dd13df2943 cpu/rpx0xx: add convenience functions to initialize mapped PIO pins 2023-05-23 08:49:37 +02:00
Fabian Hüßler
116c579cb5 cpu/rpx0xx: Add PIO I2C implementation 2023-05-23 08:49:37 +02:00
Fabian Hüßler
117a901d6f tests/periph/pio: Add basic PIO test 2023-05-23 08:49:37 +02:00
Fabian Hüßler
a74379ef16 boards/rpi-pico: Add PIO configuration 2023-05-23 08:49:37 +02:00
Fabian Hüßler
18315d3ddc cpu/rpx0xx: Add PIO implementation 2023-05-23 08:49:37 +02:00
bors[bot]
e4490f1793
Merge #19647
19647: drivers/mtd_spi_nor: fix hang and debug msgs r=aabadie a=Enoch247

### Contribution description

This patch adds a missing release of the SPI bus on error

### Testing procedure

This was discovered while attempting to bring up a board where I had the pin definitions wrong for a SPI flash part. Once the driver was fixed I was able to get the debug messages and not hang other drivers using the same bus.

### Issues/PRs references

None known

Co-authored-by: Joshua DeWeese <jdeweese@primecontrols.com>
2023-05-22 20:02:16 +00:00
bors[bot]
1324d29e59
Merge #19646
19646: drivers/sx126x: fix argument validation in spreading factor r=maribu a=maribu

### Contribution description

The lowest possible value is `LORA_SF5` and not `LORA_SF6`. This fixes the argument validation to allow setting `LORA_SF5` as spreading factor.


Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-05-22 17:09:41 +00:00
Joshua DeWeese
ff450cd7f4 drivers/mtd_spi_nor: fix hang
This patch releases the SPI bus when the memory devices is not found.
This frees the bus for other devices to use the bus. It also allows
future attempts to init the device.
2023-05-22 12:22:01 -04:00
Joshua DeWeese
33cb2f489b drivers/mtd_spi_nor: fix debug msg
This patch adds some missing newline chars to debug output ensuring the
lines get flushed and don't run together.
2023-05-22 12:21:59 -04:00
bors[bot]
dc0fe5283f
Merge #19611 #19640
19611: sys/net/rpl: fix possible NULL dereference r=benpicco a=maribu

### Contribution description

As the title says


19640: core/thread: drop unused thread_arch_t r=benpicco a=maribu

### Contribution description

No architecture makes use of thread_arch_t anymore, so let's drop it.


Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-05-22 14:10:24 +00:00
Marian Buschsieweke
b9484852f1
drivers/sx126x: fix argument validation in spreading factor
The lowest possible value is `LORA_SF5` and not `LORA_SF6`. This fixes
the argument validation to allow setting `LORA_SF5` as spreading factor.

Fixes https://github.com/RIOT-OS/RIOT/issues/17861
2023-05-22 15:06:07 +02:00
Marian Buschsieweke
dd19110e8a
dist/tools/compile_commands: add another workaround
Filter out GCC only `--param=min-pagesize=0` in `clangd` mode. This
fixes compilation of rust applications, that now fails with:

    thread 'main' panicked at 'Unable to generate bindings: ClangDiagnostic("error: argument unused during compilation: '--param=min-pagesize=0' [-Wunused-command-line-argument]\n")', /home/maribu/.cargo/git/checkouts/rust-riot-sys-d12733b89271907c/b4bd4bd/build.rs:224:10
2023-05-22 13:26:03 +02:00
a622c88105 examples/suit_update: fix redundant check in test script 2023-05-22 12:56:49 +02:00
6f00380cc3 examples/suit_update: fix "suit_coap" -> "suit_worker" in test 2023-05-22 12:56:48 +02:00
a2ef123889 examples/suit_update: add delay before getting address of device
Without this delay, the logic skips a tentative ("TNT") address, and
then times out later trying to talk to `fe80::2`.
2023-05-22 12:39:10 +02:00
Marian Buschsieweke
bf168e4b54
pkg/ndn-riot: drop unmaintained pkg
Upstream [1] has seen no activity since 2018, so it safe to assume this
is dead. It is reasonable to assume that any users - if there ever were
any - have moved on.

Fixes https://github.com/RIOT-OS/RIOT/issues/15638

[1]: https://github.com/named-data-iot/ndn-riot
2023-05-22 11:54:06 +02:00
bors[bot]
eb10a5ccd8
Merge #19604
19604: gnrc/ipv6/nib: fix 6Lo ND options on non 6Lo interface r=fabian18 a=fabian18



Co-authored-by: Fabian Hüßler <fabian.huessler@ml-pa.com>
2023-05-22 09:48:14 +00:00
Marian Buschsieweke
aed175b14b
core/thread: drop unused thread_arch_t
No architecture makes use of thread_arch_t anymore, so let's drop it.
2023-05-21 22:17:52 +02:00
da67b11e06
tests/net/gnrc_mac_timeout: add automated test 2023-05-21 16:39:10 +02:00
bors[bot]
a28f6e5a41
Merge #19628 #19637
19628: Fix periph clk r=aabadie a=Enoch247

### Contribution description

This fixes some minor doc and argument type errors. See commit messages for details.

### Testing procedure

It compiles without errors for me.

### Issues/PRs references

None known

19637: sys/usb/usbus_msc: fix typo in C expression r=aabadie a=maribu

### Contribution description

Rather than setting the correct blk_len, the code only wrote 1 and 0 into the three bytes due to the use of a logic and where a bitwise and should be used.


Co-authored-by: Joshua DeWeese <jdeweese@primecontrols.com>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-05-21 06:04:07 +00:00
Marian Buschsieweke
28c1630f54
sys/usb/usbus_msc: fix typo in C expression
Rather than setting the correct blk_len, the code only wrote 1 and 0
into the three bytes due to the use of a logic and where a bitwise
and should be used.
2023-05-20 22:18:27 +02:00
bors[bot]
8fc1187278
Merge #17830 #19635
17830: periph/timer: fix Kconfig menu title r=aabadie a=gschorcht

### Contribution description

This PR is a very small fix of inconsistent peripheral driver entry in `Kconfig` for `periph/timer`.

In Kconfig menu `(Top) → Drivers → Peripherals drivers` all entries start with the peripheral name in alphabetical order with only one exception, the timer entry. This entry is called `Configure timer peripheral driver`:
```
[ ] CPU unique ID
[ ] EEPROM peripheral driver
[ ] Flashpage peripheral driver  ----
[*] GPIO peripheral driver  --->
[ ] HWRNG peripheral driver
[ ] PWM peripheral driver
[*] Power Management (PM) peripheral driver
[*]     Auto initialize Power Management (PM) peripheral
[ ] Quadrature Decoder (QDEC) peripheral driver
[ ] RTC peripheral driver  ----
[ ] SPI peripheral driver  ----
[*] UART peripheral driver  --->
[*] Configure timer peripheral driver  --->
```
This is confusing and doesn't help to find the right entry. This PR
1. changes the entry to `Timer peripheral driver` and
2. corrects the alphabetical order.

### Testing procedure

Use command
```
TEST_KCONFIG=1 make -C tests/periph_timer menuconfig
```
and check the output. in menu `(Top) → Drivers → Peripherals drivers`. It should be with this PR:
```
[ ] CPU unique ID
[ ] EEPROM peripheral driver
[ ] Flashpage peripheral driver  ----
[*] GPIO peripheral driver  --->
[ ] HWRNG peripheral driver
[ ] PWM peripheral driver
[*] Power Management (PM) peripheral driver
[*]     Auto initialize Power Management (PM) peripheral
[ ] Quadrature Decoder (QDEC) peripheral driver
[ ] RTC peripheral driver  ----
[ ] SPI peripheral driver  ----
[*] Timer peripheral driver  --->
[*] UART peripheral driver  --->
```
### Issues/PRs references


19635: drivers/mrf24j40: cleanup function r=aabadie a=maribu

### Contribution description

`_set_csma_params()` spends some time to prepare a value in `uint8_t tmp`, which then is never used. Likely this is a leftover of moving code to `mrf24j40_set_csma_max_retries()`. This drops the leftover code.


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2023-05-20 18:43:44 +00:00
bors[bot]
7ac0b6f821
Merge #19433
19433: cpu/esp32: deduplication in Kconfig for ESP32x SoCs r=aabadie a=gschorcht

### Contribution description

This PR reduces the code duplication in Kconfig for ESP32x SoCs.

It defines a new common CPU symbol `CPU_COMMON_ESP32X` in Kconfig that is used by all `CPU_FAM_ESP32x` symbols. It selects all features, modules and packages that are common for all ESP32x SoC variants. This avoids the selection of features, modules and packages again and again for each ESP32x SoC variant.

The same is done in PR #19432 for common ESP32x board definitions.

### Testing procedure

Green CI

### Issues/PRs references

Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-05-20 15:42:00 +00:00
Marian Buschsieweke
c10b8838f1
drivers/mrf24j40: cleanup function
`_set_csma_params()` spends some time to prepare a value in
`uint8_t tmp`, which then is never used. Likely this is a leftover
of moving code to `mrf24j40_set_csma_max_retries()`. This drops the
leftover code.
2023-05-20 16:59:25 +02:00
bors[bot]
06e27d5aba
Merge #19619
19619: cpu/arm7: Fix undefined behavior based on invalid assembly r=aabadie a=Teufelchen1

### Contribution description

Hellooo! 🦤

In this PR a single `NOP` is added after an `ldm` in ARM7 common code in the scheduling management.
The change is necessary because this particular `ldm` affects certain banked registers, including `R14 / lr`. The next instruction then immediately accesses `lr`. This is invalid and the exact effect depends on the underlying hardware implementation. An intermediate `NOP` ensures correct behaviour in such cases.

The ARM docs can be found [here](https://documentation-service.arm.com/static/5f8dacc8f86e16515cdb865a), in section `A4.1.21 LDM (2)`. It states:
> In ARM architecture versions earlier than ARMv6, this form of LDM must not be
followed by an instruction that accesses banked registers. A following NOP is a good
way to ensure this.


### Testing procedure

Without this change, on the Game Boy Advance, RIOT behaves irregularly. With the `NOP`, it works fine!
If possible, this change should be tested on other ARM7 hardware as well but I do not have access to any.  

----

Special thanks `@pyropeter` for spotting the extremely tiny note on this issue within the ARM docs. You saved me hours of tears! 👾

Co-authored-by: Teufelchen1 <bennet.blischke@outlook.com>
2023-05-20 12:51:14 +00:00
bors[bot]
f47003c1db
Merge #19572
19572: cpu/stm32/periph_pwm: support of complementary timer outputs r=maribu a=gschorcht

### Contribution description

This PR provides the support of complementary timer outputs as PWM channels for advanced timers (TIM1/TIM8).

To use a complementary output of an advanced timer as PWM channel, the output is defined with an offset of 4, i.e. normal outputs are in the range of 0 to 3 (CH1...CH4) and complementary outputs are in the range of 4 to 6 (CH1N...CH3N). If the defined output is less than 4, the normal output is enabled, otherwise the complementary output is enabled.

This change is required to support PWM on boards that have connected the complementary outputs of advanced timers to the PWM connector pins, for example the STM32L496-DISCO board.

### Testing procedure

- Green CI
- Use any STM32 board which supports the `periph_pwm` feature. `tests/periph_pwm` should still work.
- Change the configuration for this board so that either timer TIM1 or TIM8 and a complementary channel is used for any exposed GPIO. `tests/periph_pwm` should also work with such a configuration.

### Issues/PRs references


Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-05-20 09:57:27 +00:00