RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Code Releases Activity

Merge #19628 #19637

Browse Source 
19628: Fix periph clk r=aabadie a=Enoch247

### Contribution description

This fixes some minor doc and argument type errors. See commit messages for details.

### Testing procedure

It compiles without errors for me.

### Issues/PRs references

None known

19637: sys/usb/usbus_msc: fix typo in C expression r=aabadie a=maribu

### Contribution description

Rather than setting the correct blk_len, the code only wrote 1 and 0 into the three bytes due to the use of a logic and where a bitwise and should be used.


Co-authored-by: Joshua DeWeese <jdeweese@primecontrols.com>
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
This commit is contained in:
bors[bot] 2023-05-21 06:04:07 +00:00 committed by GitHub
commit a28f6e5a41
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 9 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
cpu/stm32/cpu_common.c
View File

@ -58,7 +58,7 @@ static const uint8_t apbmul[] = {
#endif
};
uint32_t periph_apb_clk(uint8_t bus)
uint32_t periph_apb_clk(bus_t bus)
{
#ifdef CLOCK_APB2
if (bus == APB2) {
@ -70,7 +70,7 @@ uint32_t periph_apb_clk(uint8_t bus)
return CLOCK_APB1;
}
uint32_t periph_timer_clk(uint8_t bus)
uint32_t periph_timer_clk(bus_t bus)
{
return periph_apb_clk(bus) * apbmul[bus];
}

8
cpu/stm32/include/periph/cpu_common.h
View File

@ -119,7 +119,7 @@ typedef enum {
*
* @return bus clock frequency in Hz
*/
uint32_t periph_apb_clk(uint8_t bus);
uint32_t periph_apb_clk(bus_t bus);
/**
* @brief Get the actual timer clock frequency
@ -128,7 +128,7 @@ uint32_t periph_apb_clk(uint8_t bus);
*
* @return timer clock frequency in Hz
*/
uint32_t periph_timer_clk(uint8_t bus);
uint32_t periph_timer_clk(bus_t bus);
/**
* @brief Enable the given peripheral clock
@ -144,7 +144,7 @@ void periph_clk_en(bus_t bus, uint32_t mask);
* @param[in] bus bus the peripheral is connected to
* @param[in] mask bit in the RCC enable register
*/
void periph_lpclk_dis(bus_t bus, uint32_t mask);
void periph_clk_dis(bus_t bus, uint32_t mask);
/**
* @brief Enable the given peripheral clock in low power mode
@ -160,7 +160,7 @@ void periph_lpclk_en(bus_t bus, uint32_t mask);
* @param[in] bus bus the peripheral is connected to
* @param[in] mask bit in the RCC enable register
*/
void periph_clk_dis(bus_t bus, uint32_t mask);
void periph_lpclk_dis(bus_t bus, uint32_t mask);
#ifdef __cplusplus
}

6
sys/usb/usbus/msc/scsi.c
View File

@ -163,9 +163,9 @@ static void _scsi_read_format_capacities(usbus_handler_t *handler, uint8_t lun)
pkt->type = SCSI_READ_FMT_CAPA_TYPE_FORMATTED;
/* Manage endianness, bytes 11..9 -> LSB..MSB */
pkt->blk_len[0] = (block_size >> 16) && 0xFF;
pkt->blk_len[1] = (block_size >> 8) && 0xFF;
pkt->blk_len[2] = block_size && 0xFF;
pkt->blk_len[0] = (block_size >> 16) & 0xFF;
pkt->blk_len[1] = (block_size >> 8) & 0xFF;
pkt->blk_len[2] = block_size & 0xFF;
/* copy into ep buffer */
usbdev_ep_xmit(msc->ep_in->ep, (uint8_t *)pkt, sizeof(msc_read_fmt_capa_pkt_t));