From 99337cda9cb387fb8e329b2302d6b65b6b87958b Mon Sep 17 00:00:00 2001 From: Joshua DeWeese Date: Thu, 18 May 2023 16:09:19 -0400 Subject: [PATCH 1/3] cpu/stm32: fix incorrect doc The doxygen doc for `periph_lpclk_dis()` and `periph_clk_dis()` we flip-flopped. This patch corrects this. --- cpu/stm32/include/periph/cpu_common.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/cpu/stm32/include/periph/cpu_common.h b/cpu/stm32/include/periph/cpu_common.h index eb7cb9b518..527f6c9f5c 100644 --- a/cpu/stm32/include/periph/cpu_common.h +++ b/cpu/stm32/include/periph/cpu_common.h @@ -144,7 +144,7 @@ void periph_clk_en(bus_t bus, uint32_t mask); * @param[in] bus bus the peripheral is connected to * @param[in] mask bit in the RCC enable register */ -void periph_lpclk_dis(bus_t bus, uint32_t mask); +void periph_clk_dis(bus_t bus, uint32_t mask); /** * @brief Enable the given peripheral clock in low power mode @@ -160,7 +160,7 @@ void periph_lpclk_en(bus_t bus, uint32_t mask); * @param[in] bus bus the peripheral is connected to * @param[in] mask bit in the RCC enable register */ -void periph_clk_dis(bus_t bus, uint32_t mask); +void periph_lpclk_dis(bus_t bus, uint32_t mask); #ifdef __cplusplus } From 094977d9e0d60cee16617025773717abecae5380 Mon Sep 17 00:00:00 2001 From: Joshua DeWeese Date: Thu, 18 May 2023 16:16:04 -0400 Subject: [PATCH 2/3] cpu/stm32: make bus arg consistent Some periph clock functions took the bus arg as a `uin8_t`, others took it as a `bus_t`. This patch makes them all take it as a `bus_t`. --- cpu/stm32/cpu_common.c | 4 ++-- cpu/stm32/include/periph/cpu_common.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/cpu/stm32/cpu_common.c b/cpu/stm32/cpu_common.c index f1d0055b63..6dbfae8e2a 100644 --- a/cpu/stm32/cpu_common.c +++ b/cpu/stm32/cpu_common.c @@ -58,7 +58,7 @@ static const uint8_t apbmul[] = { #endif }; -uint32_t periph_apb_clk(uint8_t bus) +uint32_t periph_apb_clk(bus_t bus) { #ifdef CLOCK_APB2 if (bus == APB2) { @@ -70,7 +70,7 @@ uint32_t periph_apb_clk(uint8_t bus) return CLOCK_APB1; } -uint32_t periph_timer_clk(uint8_t bus) +uint32_t periph_timer_clk(bus_t bus) { return periph_apb_clk(bus) * apbmul[bus]; } diff --git a/cpu/stm32/include/periph/cpu_common.h b/cpu/stm32/include/periph/cpu_common.h index 527f6c9f5c..16b173c349 100644 --- a/cpu/stm32/include/periph/cpu_common.h +++ b/cpu/stm32/include/periph/cpu_common.h @@ -119,7 +119,7 @@ typedef enum { * * @return bus clock frequency in Hz */ -uint32_t periph_apb_clk(uint8_t bus); +uint32_t periph_apb_clk(bus_t bus); /** * @brief Get the actual timer clock frequency @@ -128,7 +128,7 @@ uint32_t periph_apb_clk(uint8_t bus); * * @return timer clock frequency in Hz */ -uint32_t periph_timer_clk(uint8_t bus); +uint32_t periph_timer_clk(bus_t bus); /** * @brief Enable the given peripheral clock From 28c1630f54d4e04162a7b497546775c195adcdce Mon Sep 17 00:00:00 2001 From: Marian Buschsieweke Date: Sat, 20 May 2023 22:16:09 +0200 Subject: [PATCH 3/3] sys/usb/usbus_msc: fix typo in C expression Rather than setting the correct blk_len, the code only wrote 1 and 0 into the three bytes due to the use of a logic and where a bitwise and should be used. --- sys/usb/usbus/msc/scsi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/sys/usb/usbus/msc/scsi.c b/sys/usb/usbus/msc/scsi.c index 50ab2db2f3..b72ef34daf 100644 --- a/sys/usb/usbus/msc/scsi.c +++ b/sys/usb/usbus/msc/scsi.c @@ -163,9 +163,9 @@ static void _scsi_read_format_capacities(usbus_handler_t *handler, uint8_t lun) pkt->type = SCSI_READ_FMT_CAPA_TYPE_FORMATTED; /* Manage endianness, bytes 11..9 -> LSB..MSB */ - pkt->blk_len[0] = (block_size >> 16) && 0xFF; - pkt->blk_len[1] = (block_size >> 8) && 0xFF; - pkt->blk_len[2] = block_size && 0xFF; + pkt->blk_len[0] = (block_size >> 16) & 0xFF; + pkt->blk_len[1] = (block_size >> 8) & 0xFF; + pkt->blk_len[2] = block_size & 0xFF; /* copy into ep buffer */ usbdev_ep_xmit(msc->ep_in->ep, (uint8_t *)pkt, sizeof(msc_read_fmt_capa_pkt_t));