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Commit Graph

105 Commits

Author SHA1 Message Date
acf948a296
fe310: Only retrieve mepc and mtval on exception 2020-08-28 14:17:33 +02:00
503806cbb3
fe310: Only save caller-saved registers on regular trap
This commit reworks the trap entry to only save the callee-saved
registers when a context switch is required. the caller-saved registers
are always stored and restored to adhere to the RISC-V ABI. This saves
considerable cycles on interrupts.
2020-08-28 14:17:01 +02:00
343f183f05
fe310: Merge intr.S into irq_arch 2020-08-26 20:17:21 +02:00
32297a9818
fe310: Remove timer initialization from IRQ code
The RISC-V timer should only be touched by periph/timer and must not be
initialized and enabled by the IRQ code. The current code can cause an
unhandled interrupt when the timer is not used and the mtime register
hits UINT64_MAX.
2020-08-26 10:33:22 +02:00
Keith Packard
531050ada2 picolibc: Enable TLS support [v4]
Allocate and initialize a thread-local block for each thread at the
top of the stack.

Set the tls base when switching to a new thread.

Add tdata/tbss linker instructions to cortex_m and risc-v scripts.

Signed-off-by: Keith Packard <keithp@keithp.com>

---

v2:
	Squash fixes

v3:
	Replace tabs with spaces

v4:
	Add tbss to fe310 linker script
2020-08-24 08:26:16 -07:00
Keith Packard
a0d3436486 cpu/fe310: Add PICOLIBC support [v3]
Disable the newlib-nano stubs code when picolibc is in use

Signed-off-by: Keith Packard <keithp@keithp.com>

---
v2:
	Squash fixes in
v3:
	call stdio_init in _PICOLIBC_ mode to initialize uart
v3:
	Remove call to stdio_init from nanostubs_init, always
	call from cpu_init.
2020-08-24 08:24:54 -07:00
Keith Packard
76f6362292 cpu/fe310: Don't register __libc_fini_array with atexit
Picolibc makes atexit state per-thread instead of global, so we can't
register destructors with atexit in a non-thread context as we won't
have any TLS space initialized.

Signed-off-by: Keith Packard <keithp@keithp.com>
2020-08-23 13:13:28 -07:00
Marian Buschsieweke
346fb432ed
cpu/fe310: Don't access sched_active_*
Replaced accesses to sched_active_* with API calls in C files
2020-08-17 12:16:07 +02:00
Francisco Molina
442b11d0ee
cpu/fe310: add unified rtt configuration 2020-08-12 14:46:59 +02:00
7acf81552a
boards/hifive1* cpu/fe310: improve clock customization 2020-08-06 15:59:34 +02:00
Marian Buschsieweke
cf482c5d46
build system: Add libstdcpp feature and doc
- Add libstdcpp feature to indicate a platform is providing a libstdc++
  implementation ready for use
- The existing cpp feature now only indicates a working C++ toolchain without
  libstdc++. (E.g. still useful for the Arduino compatibility layer.)
- Added libstdcpp as required feature were needed
- Added some documentation on C++ on RIOT
2020-07-15 11:45:22 +02:00
Benjamin Valentin
0ddca68de9 cpu/fe310: use common names for heap markers
Other archs use `_sheap` and `_eheap` to mark the start and end of
the heap.

fe310 uses `_heap_start` and `_heap_end`, so platform independent
code that wants to make use of this will needlessly fail.

For compatibility with common code, name them the same on fe310.
2020-07-07 17:25:00 +02:00
3d9421571c
cpu/fe310: migrate to inlined irq API
Co-authored-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
2020-06-26 10:48:56 +02:00
b36b2ee748
cpu/fe310: add Kconfig configuration 2020-06-24 11:13:45 +02:00
ee3fc27e96
cpu/fe310: implement driver for watchdog 2020-04-07 14:37:55 +02:00
Sören Tempel
bd2f5fe110 fe310: fix power management configuration 2020-01-30 10:43:01 +01:00
3869397ed3
cpu/fe310: move dependencies to Makefile.dep 2020-01-28 13:20:52 +01:00
Sören Tempel
5ef5ab7e4b Add CPU feature for stack smash protections 2020-01-22 15:59:02 +01:00
Francisco
f76f7c73ce
Merge pull request #12957 from aabadie/pr/cpu/fe310_spi
cpu/fe310: add spi peripheral driver
2020-01-14 10:54:47 +01:00
Tristan Bruns
532cdc64ff
cpu/fe310: implement SPI 2020-01-11 13:06:39 +01:00
298d573280
cpu/fe310: provide i2c driver 2020-01-11 13:06:10 +01:00
a953b74bc7
cpu/fe310: restore flash initialization in cpu_init 2020-01-10 16:51:10 +01:00
3f29eb9efb
cpu/fe310: use CLOCK_CORECLOCK macro to get cpu freq 2020-01-10 16:41:33 +01:00
fc911bf6c5
cpu/fe310: rework clock initialization 2020-01-10 16:41:33 +01:00
97e1c7ba7e
cpu/fe310: reorganize files and includes 2020-01-10 16:41:33 +01:00
4eba1427d2 cpu/fe310: uart_init(): drain RX fifo before enabling RX IRQ 2020-01-07 13:16:02 +01:00
e2f88abe63 cpu/fe310: periph_uart: only call rx_cb if set 2020-01-07 13:14:08 +01:00
e5c64c739a
cpu/fe310: rework uart driver implem/config 2019-12-20 15:22:09 +01:00
b49cca2d0c
cpu/fe310: include thread.h in cpu.h
This ensures the ARRAY_SIZE macro is implicitly available
2019-12-13 16:25:11 +01:00
a3706c1f02 cpu/fe310: add cpp feature 2019-12-05 18:27:12 +01:00
5e301219df
cpu/fe310: provide gpio feature at cpu level 2019-12-05 15:25:26 +01:00
Francois Berder
4a31f94cfc many typo fixes
Signed-off-by: Francois Berder <18538310+francois-berder@users.noreply.github.com>
2019-11-23 22:39:07 +01:00
Marian Buschsieweke
314184adb5
cpu: Platform specific C11 atomics compat headers
Added headers to define platform specific sizes and types for the C11 atomics
compatibility module for C++.
2019-10-24 23:08:36 +02:00
Sebastian Meiling
ea0b5ff0dd cpu: add missing arch features to fe310
Adds arch_32bit and arch_riscv to cpu/fe310 to allow for feature
requirements and blacklisting.
2019-10-14 17:40:23 +02:00
Kevin "Tristate Tom" Weiss
4b7c5915ec
Merge pull request #10953 from gschorcht/sys/shell/heap_cmd/pr
sys/shell: add heap command
2019-10-04 13:49:57 +02:00
kenrabold
1d6e37a7f7 cpu/fe310: interrupt handling cleanup
Cleanup of FE310 interrupt handler code
Optimization of intr context frame
Reduce size of intr stack
Added unhandled trap output
Fix PR #12237
2019-09-27 13:32:43 -07:00
kenrabold
547ebd1b27 cpu/fe310: use WFI to wait for SW interrupt 2019-09-16 09:32:27 -07:00
Gunar Schorcht
dfef2ce638 cpu/fe310: changes for common heap command 2019-09-05 09:20:55 +02:00
Sören Tempel
0e724e3d5d cpu/fe310: don't call thread_yield when sched_active_thread is invalid
As the comment above cpu_switch_context_exit notes:

	sched_active_thread is not valid when cpu_switch_context_exit() is called.

Unfortunately, thread_yield(), which is called directly by
cpu_switch_context_exit(), uses sched_active_thread possibly resulting
in a null pointer dereference.

Solution: Trigger a software interrupt to perform a context switch and
let sched_run() determine the next valid thread from there.
2019-08-28 18:09:05 +02:00
kenrabold
97d1dc0821 cpu/fe310: Add support for FE310_G002
Added support for FE310_G002 CPU variant that is on new HiFive1B board
2019-07-19 13:25:17 -07:00
smlng
2de4b3011b periph_common: add as dependency to periph drivers
Rational: the periph_common module is required by (most) other periph drivers
and also during startup of the CPU/MCU to run periph_init. The latter is only
required if other periph drivers are used, hence periph_common should be a
depency of periph_* modules and *not* of the CPU/MCU. This PR fixes that
by making periph_common a depency of periph_* and removing the explicit
include in the CPU/MCU implementation.
2019-06-03 13:44:10 +02:00
38cc72d0e0
Merge pull request #11046 from kaspar030/reset_fe310_timer
cpu/fe310: periph/timer: reset counter in timer_init()
2019-04-09 15:50:19 +02:00
847dc3d55c cpu/fe310: implement pm_reset() using watchdog 2019-03-12 11:49:02 +01:00
1bc82c2378 cpu/fe310: periph/timer: reset counter in timer_init() 2019-02-21 11:34:59 +01:00
Marian Buschsieweke
08fba76fa6
cpu/fe310: Add call to periph_init()
Until now fe310's cpu_init() was missing a call to periph_init().
This commit adds this call.
2019-01-19 13:00:36 +01:00
Juan I Carrano
4d85bcf510
Merge pull request #10062 from cladmi/pr/make/cpu/fe310/features
cpu/fe310: rtc depend on the rtt feature and hifive1 update
2018-10-23 13:28:17 +02:00
Martine Lenders
769bf572a0 fe310: mark closing #endif for MODULE_PERIPH_GPIO_IRQ 2018-10-09 15:11:00 +02:00
Martine Lenders
4e92c2a424
Merge pull request #10007 from haukepetersen/fix_gpioirq_fe310
cpu/fe310/gpio: use gpio_irq feature
2018-10-09 14:22:43 +02:00
cladmi
4bf7ab5dd0
cpu/fe310: rtc depend on the rtt feature
It is the role of boards based on 'cpu/fe310' to give the configuration
for the rtc/rtt.

The fe310/periph/rtc implementation depends on having periph/rtt configured
by the board so depends on the board 'providing' the periph_rtt feature
and declaring the required macros.

It should not simply depend of the 'periph_rtt' module as this does not
enforce having a configuration for the module in the board.

In practice, when compiling, it would result in undefined 'RTT' symbols,
instead of the build system detecting it.
2018-09-27 18:11:16 +02:00
smlng
59e299635b cppcheck: add/correct reason for cppcheck-suppress
Adding and correcting description/rational on why certain cppcheck
warnings or errors are intentionally suppressed.
2018-09-25 12:03:58 +02:00
Hauke Petersen
be94b99eda cpu/fe310/gpio: use gpio_irq feature 2018-09-21 08:18:14 +02:00
smlng
740eafe93b cpu/fe310: add missing PERIPH_TIMER_PROVIDES_SET 2018-09-07 22:15:13 +02:00
Hauke Petersen
c2184f3454 boards/cpu/drivers/sys: use generic stdio_ if 2018-08-22 10:54:25 +02:00
kenrabold
db4d67c4fd make: add hifive1 to BOARD_INSUFFICIENT_MEMORY
Added HiFive1 to BOARD_INSUFFICIENT_MEMORY list for examples and tests that are too big to fit

build: fixed missing syscall and cpuid failures

Added missing syscall stubs for nanostubs and fixed compile error with cpuid periph

build: fixed whitespace error

build: add hifive1 to more BOARD_INSUFFICIENT_MEMORY

doc: fixed doxygen warnings

Addressed Doxygen warnings in source file comments

doc: more doxygen fixes

doc: even more doxygen fixes

doc: more changes

build: fix pedantic and rdci_simple build failures

make: exclude lua
2018-05-29 16:27:53 -07:00
kenrabold
7d1d5e77d8 cpu/fe310: add RISC-V cpu FE310
New CPU FE310 from SiFive based on RISC-V architecture

build: add makefile for RISC-V builds

Makefile for builds using RISC-V tools
2018-05-29 15:21:45 -07:00