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cpu/fe310: provide i2c driver
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@ -75,6 +75,43 @@ typedef struct {
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*/
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#define PERIPH_TIMER_PROVIDES_SET
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/**
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* @name Use the shared I2C functions
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* @{
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*/
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/** Use read reg function from periph common */
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#define PERIPH_I2C_NEED_READ_REG
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/** Use write reg function from periph common */
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#define PERIPH_I2C_NEED_WRITE_REG
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/** Use read regs function from periph common */
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#define PERIPH_I2C_NEED_READ_REGS
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/** Use write regs function from periph common */
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#define PERIPH_I2C_NEED_WRITE_REGS
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/** @} */
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#ifndef DOXYGEN
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/**
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* @brief Default mapping of I2C bus speed values
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* @{
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*/
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#define HAVE_I2C_SPEED_T
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typedef enum {
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I2C_SPEED_NORMAL, /**< normal mode: ~100kbit/s */
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I2C_SPEED_FAST, /**< fast mode: ~400kbit/s */
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} i2c_speed_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief I2C configuration options
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*/
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typedef struct {
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uint32_t addr; /**< device base address */
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gpio_t scl; /**< SCL pin */
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gpio_t sda; /**< SDA pin */
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i2c_speed_t speed; /**< I2C speed */
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} i2c_conf_t;
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#ifdef __cplusplus
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}
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#endif
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280
cpu/fe310/periph/i2c.c
Normal file
280
cpu/fe310/periph/i2c.c
Normal file
@ -0,0 +1,280 @@
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/*
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* Copyright (C) 2019 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_fe310
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* @ingroup drivers_periph_i2c
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* @{
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*
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* @file
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* @brief Low-level I2C driver implementation
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*
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* @}
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*/
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#include <inttypes.h>
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#include <assert.h>
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#include <errno.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "periph/i2c.h"
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#include "periph_conf.h"
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#include "vendor/i2c.h"
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#include "vendor/platform.h"
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#include "vendor/prci_driver.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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#define I2C_BUSY_TIMEOUT (0xffff)
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static const uint16_t _fe310_i2c_speed[2] = { 100U, 400U };
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static inline int _wait_busy(i2c_t dev, uint32_t max_timeout_counter);
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static inline int _start(i2c_t dev, uint16_t address);
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static inline int _read(i2c_t dev, uint8_t *data, int length, uint8_t stop);
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static inline int _write(i2c_t dev, const uint8_t *data, int length, uint8_t stop);
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/**
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* @brief Initialized bus locks
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*/
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static mutex_t locks[I2C_NUMOF];
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void i2c_init(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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/* Initialize mutex */
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mutex_init(&locks[dev]);
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/* Select IOF0 */
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GPIO_REG(GPIO_IOF_SEL) &= ~((1 << i2c_config[dev].scl) | (1 << i2c_config[dev].sda));
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/* Enable IOF */
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GPIO_REG(GPIO_IOF_EN) |= ((1 << i2c_config[dev].scl) | (1 << i2c_config[dev].sda));
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_REG32(i2c_config[dev].addr, I2C_CONTROL) &= ~(I2C_CONTROL_IE | I2C_CONTROL_EN);
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/* Compute prescale: presc = (CORE_CLOCK / (5 * I2C_SPEED)) - 1 */
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uint16_t presc = ((uint16_t)(cpu_freq() / 1000) / (5 * _fe310_i2c_speed[i2c_config[dev].speed])) - 1;
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DEBUG("[i2c] init: computed prescale: %i (0x%02X|0x%02X)\n", presc, (presc >> 8), (presc & 0xFF));
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_REG32(i2c_config[dev].addr, I2C_PRESCALE_LO) = (presc & 0xFF);
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_REG32(i2c_config[dev].addr, I2C_PRESCALE_HI) = (presc >> 8);
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DEBUG("[i2c] init: stored prescale: (0x%02X|0x%02X)\n",
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(uint8_t)(_REG32(i2c_config[dev].addr, I2C_PRESCALE_HI) & 0xFF),
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(uint8_t)(_REG32(i2c_config[dev].addr, I2C_PRESCALE_LO) & 0xFF));
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_REG32(i2c_config[dev].addr, I2C_CONTROL) = I2C_CONTROL_EN;
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DEBUG("[i2c] init: control reg 0x%08X)\n",
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(unsigned)_REG32(i2c_config[dev].addr, I2C_CONTROL));
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DEBUG("[i2c] initialization done\n");
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}
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int i2c_acquire(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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mutex_lock(&locks[dev]);
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return 0;
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}
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void i2c_release(i2c_t dev)
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{
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assert(dev < I2C_NUMOF);
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mutex_unlock(&locks[dev]);
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}
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int i2c_read_bytes(i2c_t dev, uint16_t address, void *data, size_t length,
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uint8_t flags)
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{
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assert(length > 0);
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assert(dev < I2C_NUMOF);
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if (flags & I2C_ADDR10) {
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return -EOPNOTSUPP;
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}
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/* Check for wrong arguments given */
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if (data == NULL || length == 0) {
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return -EINVAL;
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}
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DEBUG("[i2c] read bytes\n");
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int ret = 0;
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if (!(flags & I2C_NOSTART)) {
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ret = _start(dev, ((address << 1) | I2C_READ));
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if (ret < 0) {
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DEBUG("[i2c] Error: start command failed\n");
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return ret;
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}
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}
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/* read data and issue stop if needed */
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ret = _read(dev, data, length, (flags & I2C_NOSTOP) ? 0 : 1);
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if (ret < 0) {
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DEBUG("[i2c] Error: read command failed\n");
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return ret;
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}
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_wait_busy(dev, I2C_BUSY_TIMEOUT);
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return length;
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}
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int i2c_write_bytes(i2c_t dev, uint16_t address, const void *data, size_t length,
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uint8_t flags)
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{
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assert(dev < I2C_NUMOF);
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int ret = 0;
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/* Check for unsupported operations */
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if (flags & I2C_ADDR10) {
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return -EOPNOTSUPP;
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}
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/* Check for wrong arguments given */
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if (data == NULL || length == 0) {
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return -EINVAL;
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}
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DEBUG("[i2c] write bytes\n");
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if (!(flags & I2C_NOSTART)) {
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ret = _start(dev, (address << 1));
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if (ret < 0) {
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DEBUG("[i2c] error: start command failed\n");
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return ret;
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}
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}
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ret = _write(dev, data, length, (flags & I2C_NOSTOP) ? 0 : 1);
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if (ret < 0) {
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DEBUG("[i2c] error: write command failed\n");
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return ret;
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}
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return 0;
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}
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static inline int _wait_busy(i2c_t dev, uint32_t max_timeout_counter)
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{
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uint32_t timeout_counter = 0;
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DEBUG("[i2c] wait for transfert\n");
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while (_REG32(i2c_config[dev].addr, I2C_STATUS) & I2C_STATUS_TIP) {
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if (++timeout_counter >= max_timeout_counter) {
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DEBUG("[i2c] transfert timeout\n");
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return -ETIMEDOUT;
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}
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else if ((_REG32(i2c_config[dev].addr, I2C_STATUS) & I2C_STATUS_ALOST) == I2C_STATUS_ALOST) {
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/* Arbitration lost */
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DEBUG("[i2c] error: Arbitration lost\n");
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return -EAGAIN;
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}
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}
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return 0;
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}
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static inline int _start(i2c_t dev, uint16_t address)
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{
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_wait_busy(dev, I2C_BUSY_TIMEOUT);
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/* start transmission */
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DEBUG("[i2c] write slave address, 0x%02X\n", address);
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_REG32(i2c_config[dev].addr, I2C_DATA) = address;
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DEBUG("[i2c] send start condition\n");
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_REG32(i2c_config[dev].addr, I2C_CMD) = (I2C_CMD_STA | I2C_CMD_WR);
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/* Ensure all bytes has been read */
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int ret = _wait_busy(dev, I2C_BUSY_TIMEOUT);
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if (ret < 0) {
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return ret;
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}
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return 0;
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}
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static inline int _read(i2c_t dev, uint8_t *data, int length, uint8_t stop)
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{
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uint8_t count = 0;
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/* Read data buffer. */
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while (length--) {
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uint8_t command = I2C_CMD_RD;
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/* Wait for hardware module to sync */
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int ret = _wait_busy(dev, I2C_BUSY_TIMEOUT);
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if (ret < 0) {
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return ret;
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}
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if (length == 0) {
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/* Send NACK before STOP */
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command |= I2C_CMD_ACK;
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/* Prepare stop command */
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if (stop) {
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command |= I2C_CMD_STO;
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}
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}
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_REG32(i2c_config[dev].addr, I2C_CMD) = command;
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/* Wait for response on bus. */
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ret = _wait_busy(dev, I2C_BUSY_TIMEOUT);
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if (ret < 0) {
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return ret;
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}
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data[count] = (uint32_t)(_REG32(i2c_config[dev].addr, I2C_DATA));
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DEBUG("[i2c] read byte #%i, 0x%02X\n", count, data[count]);
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count++;
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}
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return 0;
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}
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static inline int _write(i2c_t dev, const uint8_t *data, int length, uint8_t stop)
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{
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uint8_t count = 0;
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/* Write data buffer until the end. */
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while (length--) {
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/* Wait for hardware module to sync */
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int ret = _wait_busy(dev, I2C_BUSY_TIMEOUT);
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if (ret < 0) {
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return ret;
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}
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uint8_t command = I2C_CMD_WR;
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DEBUG("[i2c] write byte #%i, 0x%02X\n", count, data[count]);
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_REG32(i2c_config[dev].addr, I2C_DATA) = data[count++];
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/* Check if this is the last byte to read */
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if ((length == 0) && stop) {
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command |= I2C_CMD_STO;
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}
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_REG32(i2c_config[dev].addr, I2C_CMD) = command;
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ret = _wait_busy(dev, I2C_BUSY_TIMEOUT);
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if (ret < 0) {
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return ret;
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}
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}
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return 0;
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}
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