The current ISR implementation for AVR8 requires use of
avr8_[enter/exit]_isr pair which add some boilerplate on code.
This add AVR8_ISR which clean-up the code and make it simpler
and hides any schedule detail from the user perspective.
This is a preparation for future scheduling and irq optimizations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The avr8_state store state information used to determine scheduling
and uart irq. This move all uart irq states to avr8_state_uart
variable. It introduce the use of General Purpose IO Register 0
(GPIOR0) when available and now all uarts from xmega can be used.
This is a preparation for future scheduling and irq optimizations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Introduce XMEGA EBI driver. This enable EBI for use with all memory
supported by the device and peripherals. It include support to SRAM,
SDRAM, LCDs or any other external bus access.
Note: This feature only works for A1/A1U series, which are, the series
with EBI hardware.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current xmega don't have a way to disable peripherals that are
not in used. Add peripheral management to allow enable only the mcu
blocks that will be used by application. This saves power on active
and sleep modes. By default, at clock initialization, all peripherals
are now disabled and each drive must activate at initialization phase.
The periph_timer and periph_uart were updated with this new feature.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add ATxmega common files and cpu definitions.
This works was originally developed by @Josar. The 2018 version
were port to 2021 mainline.
This version changes original port to have only the atxmega CPU
definition. With that, all family can be accomodated.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
