mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
cpu/periph_spi: update implementations to new API
Make all spi_acquire() implementations return `void` and add assertions to check for valid parameters, where missing.
This commit is contained in:
parent
7aab478678
commit
f04b522601
@ -24,10 +24,10 @@
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*
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* @}
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*/
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#include <assert.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "assert.h"
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#include "periph/spi.h"
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/**
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@ -78,10 +78,11 @@ void spi_init_pins(spi_t bus)
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#endif
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void)bus;
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(void)cs;
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assert(bus == SPI_DEV(0));
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/* lock the bus and power on the SPI peripheral */
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mutex_lock(&lock);
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@ -94,8 +95,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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/* clear interrupt flag by reading SPSR and data register by reading SPDR */
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(void)SPSR;
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(void)SPDR;
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return SPI_OK;
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}
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void spi_release(spi_t bus)
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@ -87,7 +87,7 @@ void spi_init_pins(spi_t bus)
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gpio_init(spi_config[bus].mosi_pin, GPIO_OUT);
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void)cs;
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(void)clk;
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@ -106,8 +106,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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(void)dev(bus)->STATUS;
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(void)dev(bus)->DATA;
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return SPI_OK;
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}
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void spi_release(spi_t bus)
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@ -21,12 +21,13 @@
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* @}
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*/
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#include <assert.h>
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#include "vendor/hw_memmap.h"
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#include "vendor/hw_ssi.h"
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#include "cpu.h"
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#include "mutex.h"
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#include "assert.h"
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#include "periph/spi.h"
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#define ENABLE_DEBUG 0
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@ -93,10 +94,10 @@ void spi_init_pins(spi_t bus)
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gpio_init_mux(spi_config[bus].miso_pin, OVERRIDE_DISABLE, GPIO_MUX_NONE, rxd);
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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DEBUG("%s: bus=%u\n", __FUNCTION__, bus);
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(void) cs;
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(void)cs;
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/* lock the bus */
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mutex_lock(&locks[bus]);
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/* power on device */
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@ -107,8 +108,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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dev(bus)->CR0 = ((spi_clk_config[clk].scr << 8) | mode | SSI_CR0_DSS(8));
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/* enable SSI device */
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dev(bus)->CR1 = SSI_CR1_SSE;
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return SPI_OK;
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}
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void spi_release(spi_t bus)
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@ -132,6 +131,7 @@ static uint8_t _trx(cc2538_ssi_t *dev, uint8_t in)
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void spi_transfer_bytes(spi_t bus, spi_cs_t cs, bool cont,
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const void *out, void *in, size_t len)
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{
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assert((unsigned)bus < SPI_NUMOF);
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DEBUG("%s: bus=%u, len=%u\n", __FUNCTION__, bus, (unsigned)len);
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const uint8_t *out_buf = out;
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@ -56,9 +56,10 @@ void spi_init_pins(spi_t bus)
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gpio_init(spi_config[bus].miso_pin, GPIO_IN_PD);
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void)cs;
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assert((unsigned)bus < SPI_NUMOF);
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mutex_lock(&spi_lock[bus]);
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@ -68,8 +69,8 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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USART_InitSync_TypeDef init = USART_INITSYNC_DEFAULT;
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init.baudrate = (uint32_t) clk;
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init.clockMode = (USART_ClockMode_TypeDef) mode;
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init.baudrate = (uint32_t)clk;
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init.clockMode = (USART_ClockMode_TypeDef)mode;
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init.msbf = true;
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USART_InitSync(spi_config[bus].dev, &init);
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@ -86,8 +87,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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USART_ROUTEPEN_TXPEN |
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USART_ROUTEPEN_CLKPEN);
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#endif
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return SPI_OK;
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}
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void spi_release(spi_t bus)
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@ -289,7 +289,7 @@ int spi_init_cs(spi_t bus, spi_cs_t cs)
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return SPI_OK;
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}
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int IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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DEBUG("%s bus=%u cs=%u mode=%u clk=%u\n", __func__, bus, cs, mode, clk);
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@ -308,7 +308,7 @@ int IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk
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LOG_TAG_ERROR("spi",
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"SPI_DEV(%d) CS signal could not be initialized\n",
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bus);
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return SPI_NOCS;
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assert(0);
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}
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/* lock the bus */
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@ -375,8 +375,6 @@ int IRAM_ATTR spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk
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DEBUG("%s bus %d: SPI_CLOCK_REG=%08x\n",
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__func__, bus, _spi[bus].regs->clock.val);
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return SPI_OK;
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}
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void IRAM_ATTR spi_release(spi_t bus)
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@ -22,9 +22,10 @@
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* @}
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*/
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#include <assert.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "assert.h"
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#include "periph/spi.h"
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#include "vendor/spi.h"
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@ -102,7 +103,7 @@ int spi_init_cs(spi_t dev, spi_cs_t cs)
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return SPI_OK;
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}
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int spi_acquire(spi_t dev, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t dev, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void)cs;
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assert(dev < SPI_NUMOF);
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@ -111,8 +112,6 @@ int spi_acquire(spi_t dev, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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_REG32(spi_config[dev].addr, SPI_REG_SCKDIV) = _spi_clks_config[clk];
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_REG32(spi_config[dev].addr, SPI_REG_SCKMODE) = mode;
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return SPI_OK;
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}
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void spi_release(spi_t dev)
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@ -26,9 +26,10 @@
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* @}
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*/
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#include <assert.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "assert.h"
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#include "periph/spi.h"
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#define ENABLE_DEBUG 0
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@ -144,9 +145,10 @@ int spi_init_cs(spi_t bus, spi_cs_t cs)
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return SPI_OK;
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void) cs;
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(void)cs;
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assert((unsigned)bus < SPI_NUMOF);
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/* lock and power on the bus */
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mutex_lock(&locks[bus]);
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poweron(bus);
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@ -156,8 +158,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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/* configure clock and mode */
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dev(bus)->CTAR[0] = (mode | SPI_CTAR_FMSZ(7) | spi_clk_config[clk]);
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return SPI_OK;
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}
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void spi_release(spi_t bus)
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@ -67,9 +67,10 @@ void spi_init_pins(spi_t bus)
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ROM_GPIOPinTypeSSI(spi_confs[bus].gpio_port, spi_confs[bus].pins.mask);
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void) cs;
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(void)cs;
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assert((unsigned)bus < SPI_NUMOF);
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/* lock bus */
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mutex_lock(&locks[bus]);
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/* enable clock for SSI */
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@ -83,8 +84,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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8);
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ROM_SSIEnable(spi_confs[bus].ssi_base);
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return SPI_OK;
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}
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void spi_release(spi_t bus)
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@ -95,20 +95,17 @@ void spi_init_pins(spi_t bus)
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*(&PINSEL0 + cfg->pinsel_clk) |= cfg->pinsel_msk_clk;
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void) cs;
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(void)cs; (void)mode;
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assert((unsigned)bus < SPI_NUMOF);
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assert(mode == SPI_MODE_0);
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uint32_t pclksel;
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uint32_t cpsr;
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lpc23xx_spi_t *dev = get_dev(bus);
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/* only support for mode 0 at the moment */
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if (mode != SPI_MODE_0) {
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return SPI_NOMODE;
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}
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/* lock bus */
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mutex_lock(&lock[bus]);
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@ -141,8 +138,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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while (dev->SR & SSPSR_RNE) { /* while RNE (Receive FIFO Not Empty)...*/
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dev->DR; /* read data*/
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}
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return SPI_OK;
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}
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void spi_release(spi_t bus)
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@ -23,9 +23,10 @@
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* @}
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*/
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#include <assert.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "assert.h"
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#include "periph/spi.h"
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/**
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@ -36,7 +37,7 @@ static mutex_t spi_lock = MUTEX_INIT;
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void spi_init(spi_t bus)
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{
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assert(bus <= SPI_NUMOF);
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assert((unsigned)bus < SPI_NUMOF);
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/* we need to differentiate between the legacy SPI device and USCI */
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#ifndef SPI_USE_USCI
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@ -66,14 +67,12 @@ void spi_init_pins(spi_t bus)
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gpio_periph_mode(SPI_PIN_CLK, true);
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void)bus;
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(void)cs;
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if (clk == SPI_CLK_10MHZ) {
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return SPI_NOCLK;
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}
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assert((unsigned)bus < SPI_NUMOF);
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assert(clk != SPI_CLK_10MHZ);
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/* lock the bus */
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mutex_lock(&spi_lock);
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@ -100,8 +99,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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/* release from software reset */
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SPI_BASE->CTL1 &= ~(USCI_SPI_CTL1_SWRST);
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#endif
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return SPI_OK;
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}
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void spi_release(spi_t bus)
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@ -20,6 +20,7 @@
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#ifdef MODULE_PERIPH_SPIDEV_LINUX
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#include <assert.h>
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#include <fcntl.h>
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#include <string.h>
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#include <sys/ioctl.h>
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@ -145,12 +146,10 @@ void spidev_linux_teardown(void)
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}
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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DEBUG("spi_acquire(%u, %u, 0x%02x, %d)\n", bus, cs, mode, clk);
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if (bus >= SPI_NUMOF) {
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return SPI_NODEV;
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}
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assert((unsigned)bus < SPI_NUMOF);
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mutex_lock(&(device_state[bus].lock));
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@ -166,8 +165,7 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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unsigned csid = CS_TO_CSID(cs);
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if (device_state[bus].fd[csid] < 0) {
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DEBUG("spi_acquire: No fd for %u:%u\n", bus, csid);
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mutex_unlock(&(device_state[bus].lock));
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return SPI_NOCS;
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assert(0);
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}
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fd = device_state[bus].fd[csid];
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DEBUG("spi_acquire: Using %u:%u with HWCS (-> fd 0x%x)\n", bus, csid, fd);
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@ -175,25 +173,23 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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else if (IS_GPIO_CS(cs) || cs == SPI_CS_UNDEF) {
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fd = spidev_get_first_fd(&(device_state[bus]));
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if (fd < 0) {
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mutex_unlock(&(device_state[bus].lock));
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return SPI_NOCS;
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DEBUG("spi_acquire: Invalid CS parameter\n");
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assert(0);
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}
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DEBUG("spi_acquire: Using SPI_CS_UNDEF (-> fd 0x%x)\n", fd);
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}
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else {
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DEBUG("spi_acquire: Invalid CS parameter\n");
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mutex_unlock(&(device_state[bus].lock));
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return SPI_NOCS;
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assert(0);
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}
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int res = spi_set_params(fd, use_hwcs, mode, clk);
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if (res < 0) {
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DEBUG("spi_acquire: set_params failed\n");
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mutex_unlock(&(device_state[bus].lock));
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assert(0);
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}
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DEBUG("spi_acquire: bus %u acquired\n", bus);
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return SPI_OK;
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}
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void spi_init(spi_t bus)
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@ -21,9 +21,10 @@
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* @}
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*/
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#include <assert.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "assert.h"
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#include "periph/spi.h"
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#include "periph/gpio.h"
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@ -59,9 +60,10 @@ void spi_init_pins(spi_t bus)
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SPI_MISOSEL = spi_config[bus].miso;
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}
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int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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{
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(void) cs;
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(void)cs;
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assert((unsigned)bus < SPI_NUMOF);
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mutex_lock(&locks[bus]);
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/* power on the bus (NRF51 only) */
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@ -71,8 +73,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
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dev(bus)->FREQUENCY = clk;
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/* enable the bus */
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dev(bus)->ENABLE = 1;
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return SPI_OK;
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}
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void spi_release(spi_t bus)
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@ -24,9 +24,10 @@
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* @}
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*/
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#include <assert.h>
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#include "cpu.h"
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#include "mutex.h"
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#include "assert.h"
|
||||
#include "periph/spi.h"
|
||||
#include "periph/gpio.h"
|
||||
#include "periph_cpu.h"
|
||||
@ -147,9 +148,10 @@ void spi_init_pins(spi_t bus)
|
||||
spi_twi_irq_register_spi(dev(bus), spi_isr_handler, (void *)bus);
|
||||
}
|
||||
|
||||
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
{
|
||||
(void)cs;
|
||||
assert((unsigned)bus < SPI_NUMOF);
|
||||
|
||||
mutex_lock(&locks[bus]);
|
||||
/* configure bus */
|
||||
@ -157,8 +159,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
dev(bus)->FREQUENCY = clk;
|
||||
/* enable the bus */
|
||||
dev(bus)->ENABLE = SPIM_ENABLE_ENABLE_Enabled;
|
||||
|
||||
return SPI_OK;
|
||||
}
|
||||
|
||||
void spi_release(spi_t bus)
|
||||
|
@ -20,7 +20,8 @@
|
||||
* @}
|
||||
*/
|
||||
|
||||
#include "assert.h"
|
||||
#include <assert.h>
|
||||
|
||||
#include "bitarithm.h"
|
||||
#include "mutex.h"
|
||||
|
||||
@ -187,8 +188,10 @@ void spi_deinit_pins(spi_t bus)
|
||||
}
|
||||
#endif /* MODULE_PERIPH_SPI_RECONFIGURE */
|
||||
|
||||
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
{
|
||||
assert((unsigned)bus < SPI_NUMOF);
|
||||
assert((mode & ~(SPI_CFG_CPHA_MASK | SPI_CFG_CPOL_MASK)) == 0);
|
||||
const spi_conf_t *const conf = &spi_config[bus];
|
||||
|
||||
mutex_lock(&locks[bus]);
|
||||
@ -197,18 +200,12 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
* matter how far it is from the requested one. */
|
||||
_spi_controller_set_speed(conf->dev, clk);
|
||||
|
||||
if ((mode & ~(SPI_CFG_CPHA_MASK | SPI_CFG_CPOL_MASK)) != 0) {
|
||||
return SPI_NOMODE;
|
||||
}
|
||||
|
||||
DEBUG("[spi] acquire: mode CPHA=%d CPOL=%d, cs=0x%" PRIx32 "\n",
|
||||
!!(mode & SPI_CFG_CPHA_MASK), !!(mode & SPI_CFG_CPOL_MASK),
|
||||
(uint32_t)cs);
|
||||
|
||||
conf->dev->CFG =
|
||||
(conf->dev->CFG & ~(SPI_CFG_CPHA_MASK | SPI_CFG_CPOL_MASK)) | mode;
|
||||
|
||||
return SPI_OK;
|
||||
}
|
||||
|
||||
void spi_release(spi_t bus)
|
||||
|
@ -26,9 +26,10 @@
|
||||
* @}
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#include "cpu.h"
|
||||
#include "mutex.h"
|
||||
#include "assert.h"
|
||||
#include "periph/spi.h"
|
||||
#include "pm_layered.h"
|
||||
|
||||
@ -374,9 +375,10 @@ void spi_deinit_pins(spi_t bus)
|
||||
gpio_disable_mux(spi_config[bus].mosi_pin);
|
||||
}
|
||||
|
||||
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
{
|
||||
(void)cs;
|
||||
assert((unsigned)bus < SPI_NUMOF);
|
||||
|
||||
/* get exclusive access to the device */
|
||||
mutex_lock(&locks[bus]);
|
||||
@ -392,8 +394,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
|
||||
/* mux clk_pin to SPI peripheral */
|
||||
gpio_init_mux(spi_config[bus].clk_pin, spi_config[bus].clk_mux);
|
||||
|
||||
return SPI_OK;
|
||||
}
|
||||
|
||||
void spi_release(spi_t bus)
|
||||
|
@ -23,9 +23,10 @@
|
||||
* @}
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#include "cpu.h"
|
||||
#include "mutex.h"
|
||||
#include "assert.h"
|
||||
#include "periph/gpio.h"
|
||||
#include "periph/spi.h"
|
||||
|
||||
@ -62,9 +63,11 @@ void spi_init_pins(spi_t bus)
|
||||
gpio_init_mux(spi_config[bus].miso, spi_config[bus].mux);
|
||||
}
|
||||
|
||||
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
{
|
||||
(void) cs;
|
||||
(void)cs;
|
||||
assert((unsigned)bus < SPI_NUMOF);
|
||||
|
||||
/* lock bus */
|
||||
mutex_lock(&locks[bus]);
|
||||
/* enable SPI device clock */
|
||||
@ -73,8 +76,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
dev(bus)->SPI_CSR[0] = (SPI_CSR_SCBR(CLOCK_CORECLOCK / clk) | mode);
|
||||
dev(bus)->SPI_MR = (SPI_MR_MSTR | SPI_MR_MODFDIS);
|
||||
dev(bus)->SPI_CR = SPI_CR_SPIEN;
|
||||
|
||||
return SPI_OK;
|
||||
}
|
||||
|
||||
void spi_release(spi_t bus)
|
||||
|
@ -26,6 +26,8 @@
|
||||
* @}
|
||||
*/
|
||||
|
||||
#include <assert.h>
|
||||
|
||||
#include "bitarithm.h"
|
||||
#include "cpu.h"
|
||||
#include "mutex.h"
|
||||
@ -219,8 +221,9 @@ int spi_init_with_gpio_mode(spi_t bus, spi_gpio_mode_t mode)
|
||||
}
|
||||
#endif
|
||||
|
||||
int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
void spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
{
|
||||
assert((unsigned)bus < SPI_NUMOF);
|
||||
|
||||
/* lock bus */
|
||||
mutex_lock(&locks[bus]);
|
||||
@ -279,8 +282,6 @@ int spi_acquire(spi_t bus, spi_cs_t cs, spi_mode_t mode, spi_clk_t clk)
|
||||
if (cr2_extra_settings) {
|
||||
dev(bus)->CR2 = (SPI_CR2_SETTINGS | cr2_extra_settings);
|
||||
}
|
||||
|
||||
return SPI_OK;
|
||||
}
|
||||
|
||||
void spi_release(spi_t bus)
|
||||
|
Loading…
Reference in New Issue
Block a user