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cpu/avr8_common: Split avr8_state
The avr8_state store state information used to determine scheduling and uart irq. This move all uart irq states to avr8_state_uart variable. It introduce the use of General Purpose IO Register 0 (GPIOR0) when available and now all uarts from xmega can be used. This is a preparation for future scheduling and irq optimizations. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
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@ -2,6 +2,7 @@
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* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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* 2017 Thomas Perrot <thomas.perrot@tupi.fr>
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* 2023 Hugues Larrive
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* 2023 Gerson Fernando Budke
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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@ -20,6 +21,7 @@
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* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
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* @author Thomas Perrot <thomas.perrot@tupi.fr>
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* @author Hugues Larrive <hugues.larrive@pm.me>
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* @author Gerson Fernando Budke <nandojve@gmail.com>
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*
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*
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* Support static BAUD rate calculation using STDIO_UART_BAUDRATE.
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@ -192,8 +194,9 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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/* start of TX won't finish until no data in UDRn and transmit shift
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register is empty */
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unsigned long state = irq_disable();
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avr8_state |= AVR8_STATE_FLAG_UART_TX(uart);
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avr8_uart_tx_set_pending(uart);
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irq_restore(state);
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dev[uart]->DR = data[i];
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}
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}
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@ -225,7 +228,7 @@ static inline void _tx_isr_handler(int num)
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/* entire frame in the Transmit Shift Register has been shifted out and
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there are no new data currently present in the transmit buffer */
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avr8_state &= ~AVR8_STATE_FLAG_UART_TX(num);
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avr8_uart_tx_clear_pending(num);
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avr8_exit_isr();
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}
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@ -1,5 +1,5 @@
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/*
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* Copyright (C) 2021 Gerson Fernando Budke <nandojve@gmail.com>
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* Copyright (C) 2021-2023 Gerson Fernando Budke <nandojve@gmail.com>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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@ -310,7 +310,7 @@ void uart_write(uart_t uart, const uint8_t *data, size_t len)
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/* start of TX won't finish until no data in DATAn and transmit shift
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register is empty */
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uint8_t irq_state = irq_disable();
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avr8_state |= AVR8_STATE_FLAG_UART_TX(uart);
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avr8_uart_tx_set_pending(uart);
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irq_restore(irq_state);
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dev(uart)->DATA = data[i];
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@ -344,7 +344,7 @@ static inline void _tx_isr_handler(int num)
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/* entire frame in the Transmit Shift Register has been shifted out and
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there are no new data currently present in the transmit buffer */
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avr8_state &= ~AVR8_STATE_FLAG_UART_TX(num);
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avr8_uart_tx_clear_pending(num);
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avr8_exit_isr();
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}
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@ -2,7 +2,7 @@
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* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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* 2017 RWTH Aachen, Josua Arndt
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* 2018 Matthew Blue
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* 2021 Gerson Fernando Budke
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* 2021-2023 Gerson Fernando Budke
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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@ -69,6 +69,9 @@
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uint8_t mcusr_mirror __attribute__((section(".noinit")));
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uint8_t soft_rst __attribute__((section(".noinit")));
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uint8_t avr8_state = 0;
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#if (AVR8_STATE_UART_USE_SRAM)
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uint8_t avr8_state_uart_sram = 0;
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#endif
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void get_mcusr(void) __attribute__((naked, section(".init0"), used));
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@ -118,6 +121,9 @@ void cpu_init(void)
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| PMIC_LOLVLEN_bm;
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#endif
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/* Set global resources initial state */
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avr8_state_uart = 0;
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irq_enable();
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}
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@ -2,7 +2,7 @@
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* Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
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* 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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* 2018 RWTH Aachen, Josua Arndt <jarndt@ias.rwth-aachen.de>
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* 2021 Gerson Fernando Budke <nandojve@gmail.com>
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* 2021-2023 Gerson Fernando Budke <nandojve@gmail.com>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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@ -41,6 +41,7 @@
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#include "cpu_clock.h"
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#include "sched.h"
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#include "thread.h"
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#include "states_internal.h"
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#ifdef __cplusplus
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extern "C"
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@ -62,14 +63,6 @@ extern "C"
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* @{
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*/
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#define AVR8_STATE_FLAG_ISR (0x80U) /**< In ISR */
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#define AVR8_STATE_FLAG_UART0_TX (0x01U) /**< TX pending for UART 0 */
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#define AVR8_STATE_FLAG_UART1_TX (0x02U) /**< TX pending for UART 1 */
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#define AVR8_STATE_FLAG_UART2_TX (0x04U) /**< TX pending for UART 2 */
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#define AVR8_STATE_FLAG_UART3_TX (0x08U) /**< TX pending for UART 3 */
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#define AVR8_STATE_FLAG_UART4_TX (0x10U) /**< TX pending for UART 4 */
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#define AVR8_STATE_FLAG_UART5_TX (0x20U) /**< TX pending for UART 5 */
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#define AVR8_STATE_FLAG_UART6_TX (0x40U) /**< TX pending for UART 6 */
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#define AVR8_STATE_FLAG_UART_TX(x) (0x01U << x) /**< TX pending for UART x */
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/** @} */
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/**
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@ -83,20 +76,13 @@ extern "C"
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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* 7 6 5 4 3 2 1 0
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* +---+---+---+---+---+---+---+---+
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* |IRQ|TX6|TX5|TX4|TX3|TX2|TX1|TX0|
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* |IRQ| RESERVED |
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* +---+---+---+---+---+---+---+---+
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* | Label | Description |
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* |:-------|:--------------------------------------------------------------|
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* | IRQ | This bit is set when in IRQ context |
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* | TX6 | This bit is set when on UART6 TX is pending |
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* | TX5 | This bit is set when on UART5 TX is pending |
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* | TX4 | This bit is set when on UART4 TX is pending |
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* | TX3 | This bit is set when on UART3 TX is pending |
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* | TX2 | This bit is set when on UART2 TX is pending |
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* | TX1 | This bit is set when on UART1 TX is pending |
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* | TX0 | This bit is set when on UART0 TX is pending |
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*/
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extern uint8_t avr8_state;
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@ -139,6 +125,33 @@ static inline void avr8_enter_isr(void)
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avr8_state |= AVR8_STATE_FLAG_ISR;
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}
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/**
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* @brief Compute UART TX channel
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*
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* @param uart The UART number
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*/
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#define AVR8_STATE_FLAG_UART_TX(uart) (0x01U << uart)
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/**
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* @brief Set UART TX channel as pending
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*
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* @param uart The UART number
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*/
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static inline void avr8_uart_tx_set_pending(unsigned uart)
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{
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avr8_state_uart |= AVR8_STATE_FLAG_UART_TX(uart);
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}
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/**
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* @brief Clear UART TX channel pending state
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*
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* @param uart The UART number
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*/
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static inline void avr8_uart_tx_clear_pending(unsigned uart)
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{
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avr8_state_uart &= ~AVR8_STATE_FLAG_UART_TX(uart);
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}
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/**
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* @brief Check if TX on any present UART device is still pending
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*
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@ -147,14 +160,7 @@ static inline void avr8_enter_isr(void)
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*/
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static inline int avr8_is_uart_tx_pending(void)
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{
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uint8_t state = avr8_get_state();
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return (state & (AVR8_STATE_FLAG_UART0_TX
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| AVR8_STATE_FLAG_UART1_TX
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| AVR8_STATE_FLAG_UART2_TX
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| AVR8_STATE_FLAG_UART3_TX
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| AVR8_STATE_FLAG_UART4_TX
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| AVR8_STATE_FLAG_UART5_TX
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| AVR8_STATE_FLAG_UART6_TX));
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return avr8_state_uart;
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}
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/**
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80
cpu/avr8_common/include/states_internal.h
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80
cpu/avr8_common/include/states_internal.h
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@ -0,0 +1,80 @@
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/*
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* Copyright (C) 2023 Gerson Fernando Budke
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_avr8_common
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* @{
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*
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* @file
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* @brief States internal interface
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*
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* @author Gerson Fernando Budke <nandojve@gmail.com>
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*
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*/
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#ifndef STATES_INTERNAL_H
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#define STATES_INTERNAL_H
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#include <avr/io.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Internal flag which defines if uart state is stored on SRAM
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* @{
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*/
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#ifdef GPIOR0
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#define AVR8_STATE_UART_USE_SRAM 0 /**< UART state using GPIOR registers. */
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#else
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#define AVR8_STATE_UART_USE_SRAM 1 /**< UART state using SRAM. */
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#endif
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/** @} */
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/**
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* @name UART TX pending state
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* @{
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*
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* @note The content must be changed using the pair
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* @ref avr8_uart_tx_set_pending and @ref avr8_uart_tx_clear_pending
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* methods and the state is stored on @ref avr8_state_uart.
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*
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* Contents:
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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* 7 6 5 4 3 2 1 0
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* +---+---+---+---+---+---+---+---+
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* |TX7|TX6|TX5|TX4|TX3|TX2|TX1|TX0|
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* +---+---+---+---+---+---+---+---+
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* | Label | Description |
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* |:-------|:--------------------------------------------------------------|
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* | TX7 | This bit is set when on UART7 TX is pending |
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* | TX6 | This bit is set when on UART6 TX is pending |
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* | TX5 | This bit is set when on UART5 TX is pending |
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* | TX4 | This bit is set when on UART4 TX is pending |
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* | TX3 | This bit is set when on UART3 TX is pending |
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* | TX2 | This bit is set when on UART2 TX is pending |
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* | TX1 | This bit is set when on UART1 TX is pending |
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* | TX0 | This bit is set when on UART0 TX is pending |
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*/
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#if (AVR8_STATE_UART_USE_SRAM)
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extern uint8_t avr8_state_uart_sram; /**< UART state variable. */
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#define avr8_state_uart avr8_state_uart_sram /**< Definition for SRAM. */
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#else
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#define avr8_state_uart GPIOR0 /**< Definition for GPIOR0. */
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#endif
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* STATES_INTERNAL_H */
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/** @} */
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