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Commit Graph

332 Commits

Author SHA1 Message Date
Marian Buschsieweke
62aa3d103f
cpu/stm32/periph_eth: RX Timestamps 2021-01-26 10:44:04 +01:00
87cd41a6d1
Merge pull request #15657 from aabadie/pr/cpu/stm32_merge_clock_headers
cpu/stm32: merge clock source selection headers
2021-01-25 13:57:05 +01:00
49a3592f92
Merge pull request #15849 from benpicco/cpu/stm32f7-adc
cpu/stm32: add periph_adc for STM32F7
2021-01-25 13:12:22 +01:00
5fef40ab5a
cpu/stm32/clk: cleanup common clock configuration 2021-01-25 11:46:35 +01:00
dfed1b0567
cpu/stm32: merge g0 and g4 clock configuration headers 2021-01-25 11:46:34 +01:00
0aadf367cc
cpu/stm32: rework common clock source selection header 2021-01-25 11:46:34 +01:00
Francisco
947c63666e
Merge pull request #15834 from leandrolanzieri/pr/cpu/stm32/kconfig_features_conflict_fix
cpu/stm32/kconfig: fix rtt/rtc error symbol
2021-01-25 10:15:32 +01:00
AravindKarri
63252d17c0 cpu/stm32/adc_f4: add support for stm32f7 2021-01-24 22:30:49 +01:00
Leandro Lanzieri
e5aca465bd
cpu/stm32/kconfig: fix rtt:rtc error symbol
It only exists conflict between the usage of RTC and RTT on the F1
family, but the error symbol was being set for all of them. This fixes
the issue.
2021-01-23 09:59:03 +01:00
benpicco
46337efd93
Merge pull request #15783 from maribu/stm32_eth_fix_error_handling
cpu/stm32/periph_eth: fix error handling in send()
2021-01-22 20:25:25 +01:00
b1f7fd3905
cpu/stm32: fix wrong max clock for stm32f423xx line 2021-01-21 18:31:15 +01:00
Marian Buschsieweke
21264b80cf
cpu/stm32/periph_eth: improve debugging output
Add ENABLE_DEBUG_VERBOSE flag, so that the noise during debugging can be
reduced. This is super helpful when testing under load, as otherwise there is
just too much noise in the output.
2021-01-20 10:36:59 +01:00
Marian Buschsieweke
788f997452
cpu/stm32/periph_eth: fix error handling
An earlier version of periph_eth used to always pack the first chunk of the
outgoing frame to the first DMA descriptor by telling the DMA to jump back
to the first descriptor within the last descriptor. This worked fine unless
the frame was send in one chunk (as e.g. lwip does), which resulted due to a
hardware bug in a frame being send out twice. For that reason, the behavior was
changed to cycle throw the linked DMA descriptor list in round-robin fashion.
However, the error checking was not updated accordingly. Hence, the error
check might run over (parts of) unrelated frames and fail to detect errors
correctly.

This commit fixes the issue and also provides proper return codes for errors.

Additionally, an DMA reset is performed on detected errors during RX/TX. I'm
not sure if/when this is needed, as error conditions are neigh impossible to
produce. But better be safe than sorry.
2021-01-20 10:35:05 +01:00
e1941d8976
cpu/stm32f2f4f7: expose clock settings in Kconfig 2021-01-19 22:09:16 +01:00
Francisco Molina
7c12ea7416
cpu/stm32/rtc: add unlock/lock to rtc_clear_alarm 2021-01-19 13:33:17 +01:00
Sebastiaan de Schaetzen
6e90111eb9 stm32/periph/uart: set flow control bits before enabling uart 2021-01-12 07:37:19 +01:00
b13598cdc4
cpu/stm32: fix ENABLE_DEBUG definition 2021-01-08 14:37:33 +01:00
d027454ad4
cpu/stm32/kconfig: use depends on instead of if 2021-01-07 16:07:04 +01:00
e8a5493080
cpu/stm32: model MCO in Kconfig for l4/wb 2021-01-07 16:02:30 +01:00
0e39c2ba17
cpu/stm32: model MCO in Kconfig for l0/l1 2021-01-07 16:02:29 +01:00
a9b154b4ac
cpu/stm32: model MCO in Kconfig for g0/g4 2021-01-07 16:02:29 +01:00
1f0e6c1057
cpu/stm32: model MCO in Kconfig for f0/f1/f3 2021-01-07 16:02:29 +01:00
5e719816d2
cpu/stm32/kconfigs: select cpu fam/lines without mco prescaler 2021-01-07 16:02:29 +01:00
048e8446ef
cpu/stm32f0: remove old clock configuration header 2020-12-17 08:38:40 +01:00
45c2b19f25
cpu/stm32: merge f0f1f3 clock configuration headers 2020-12-17 08:38:40 +01:00
8f6005b26e
boards: cpu: stm32f1: use .config for specific iotlab PLL_PREDIV 2020-12-08 18:02:57 +01:00
c68f63b318
cpu/stm32f1f3: handle custom pll prediv/mul at cpu level 2020-12-08 17:36:52 +01:00
0f23c875a2
cpu/stm32: adapt Kconfig clock configuration for f1/f3 2020-12-08 17:36:51 +01:00
benpicco
a80631a297
Merge pull request #15074 from maribu/ptp-clock
drivers/periph/ptp_clock
2020-12-03 09:59:07 +01:00
Marian Buschsieweke
ea3752db77
cpu/stm32: Added PTP clock implementation 2020-12-02 17:53:00 +01:00
b0b19203a7
Merge pull request #15190 from benpicco/boards/wefun-f401cc
boards/common/weact-f4x1cx: create common WeAct boards
2020-12-01 12:03:38 +01:00
Benjamin Valentin
0ed34cdb4d cpu/stm32: periph_eth: drop addr from eth_conf_t
MAC address is now supplied by EUI provider, no need to hard-code
it for the board.
2020-11-29 23:11:14 +01:00
Benjamin Valentin
a28a60f16c cpu/stm32: periph_eth: register with netdev 2020-11-29 23:10:37 +01:00
3f0ea86963 cpu/stm32/include/periph_cpu.h: add missing limits.h include 2020-11-23 16:56:34 +01:00
81c270dc1b
stm32/flashpage: Remove page address casts from erase
This removes the redefinitions of the page address in the erase
function.
2020-11-18 12:30:40 +01:00
aebf6f06d8
stm32/flashpage: Add common stm32_flashpage_block_t type
This commits adds a common type for the block writes to the flash of the
stm32. Depending on the family, the type has a different size. This
allows the removal of a number of ifdefs to track the differences
between families, simplifying the flashpage code
2020-11-18 12:04:57 +01:00
Leandro Lanzieri
5a04f94b63
Merge pull request #14967 from aabadie/pr/boards/stm32f0_clock_kconfig_only
boards/stm32f0: add Kconfig for clock configuration
2020-11-17 12:14:10 +01:00
Gilles DOFFE
e4fa203db4 cpu/stm32: STM32MP1 family has no flash
Then CPU_FLASH_BASE cannot be defined as FLASH_BASE does not exist.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
5ec5b335f1 cpu/stm32: add Kconfig files for STM32MP157CAC model
Note that Kconfig.models was not generated with gen_kconfig.py tool
due to lack of ProductsList.xlsx file for STM32MP1 family.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
ce0ef8939c cpu/stm32: disable periph_wdt for mp1 family
In STM32MP1 family, independant watchdogs (IWDG1 and IWDG2) are
dedicated to the MPU (Cortex-A7). Thus simply disable the feature
for STM32MP1 family.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
2ac0467807 cpu/stm32: configure timer2 for stm32mp1 boards
This timer will be used by RIOT-OS as the scheduling timer for
stm32mp157c-dk2 board.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
504fba61b8 cpu/stm32: add uart support for stm32mp1
stm32mp1 family uart driver is the same than for other stm32 families.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
ec97eb8447 cpu/stm32: set CPU_LINE for stm32mp157c
Set CPU_LINE variable according to informations extracted from
stm32_info.mk.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
7b7a75c3ca cpu/stm32: setup memory length for stm32mp157x
The stm32mp157c has the particularity to not having flash memory but
only SRAM.
Thus a part of SRAM must be considered as a ROM to flash the firmware
into.
In case of the stm32mp157c, the RETRAM (64kB) is used as ROM and the
4 banks of SRAM (384kB) are used as RAM.
However, as ROM_LEN, RAM_LEN, ROM_START_ADDRESS, RAM_START_ADDRESS and
ROM_OFFSET could be overloaded by user, set them with "?=" operator.
If the ROM_START_ADDRESS and the RAM_START_ADDRESS are not set at the
end of that file, it is a classic stm32 MCU with flash, thus set this
variables with common memory addresses for stm32 MCU family:
ROM_START_ADDR ?= 0x08000000
RAM_START_ADDR ?= 0x20000000

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
4bfbb75578 cpu/stm32: add stm32mp1_eng_mode pseudomodule
In Engineering mode (BOOT0 off and BOOT2 on), only the Cortex-M4
core is running. It means that all clocks have to be setup
by the Cortex-M4 core.
In other modes, the clocks are setup by the Cortex-A7 and then should
not be setup by Cortex-M4.
stm32mp1_eng_mode pseudomodule have to be used in Engineering mode
to ensure clocks configuration with IS_USED(MODULE_STM32MP1_ENG_MODE)
macro.
This macro can also be used in periph_conf.h to define clock source
for each peripheral.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
3008574d0e cpu/stm32: remove uneeded pm macro tests
STM32_PM_STOP and STM32_PM_STANDBY are always defined in periph_cpu.h,
Thus it is not needed to test them.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
6bac94fb6d cpu/stm32: setup power management for stm32mp1
According to stm32mp157 documentation:
* "The CStop mode is entered for MCU when the SLEEPDEEP bit in the Cortex®-M4 System Control
   register is set." Thus set PM_STOP_CONFIG to 0.
* "The CStandby mode applies only to the MPU sub-system."
  Set PM_STANDBY_CONFIG to (0) and do not enter standby mode for
  stm32mp1.

As PM_STOP_CONFIG is already defined before for CPU_FAM_STM32WB, replace
it with CPU_FAM_STM32MP1.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
e9a6b448cf cpu/stm32: add gpio support for stm32mp1 family
stm32mp1 is configuring gpio slightly differently that common stm32:
* port_num is computed differently, thus test MCU family to apply
  the good calculation.
* Rising and falling edge state on interrupts. Do not test if falling
  or rising edge, just launch the callback in all cases.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
be2c0ae179 cpu/stm32: define CPU_IRQ_NUMOF for stm32mp157cac
This MCU has 150 interrupt vectors.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
Gilles DOFFE
91a12c200c cpu/stm32: do not retrieve cmsis headers
Normally, CMSIS headers are retrieved as package from ST git repository
for each stm32.
However stm32mp1 family does not have a CMSIS headers repository but
have been included into RIOT source code in a previous commit.
For stm32mp1, CMSIS headers package must then not be retrieved and
vectors have to be generated from already in-source CMSIS headers.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00