RIOT-OS/RIOT
RIOT-OS/RIOT
1
0
Fork 0
mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00
Code Releases Activity

cpu/sam*: fix doxygen grouping warnings

Browse Source 
Signed-off-by: Jean-Pierre De Jesus DIAZ <me@jeandudey.tech>
This commit is contained in:
Jean-Pierre De Jesus DIAZ 2021-09-05 20:39:51 +02:00
parent 9d1cff3b55
commit 480e22be66
5 changed files with 4 additions and 33 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
cpu/sam3/include/periph_cpu.h
View File

@ -28,25 +28,17 @@
extern "C" {
#endif
/**
* @brief Overwrite the default gpio_t type definition
*/
#ifndef DOXYGEN
#define HAVE_GPIO_T
typedef uint32_t gpio_t;
/** @} */
/**
* @brief Definition of a fitting UNDEF value
*/
#define GPIO_UNDEF (0xffffffff)
/**
* @brief Define a CPU specific GPIO pin generator macro
*/
#define GPIO_PIN(x, y) (((uint32_t)PIOA + (x << 9)) | y)
#endif /* DOXYGEN */
/**
* @brief Declare needed generic SPI functions
* @name Declare needed generic SPI functions
* @{
*/
#define PERIPH_SPI_NEEDS_INIT_CS
@ -118,10 +110,6 @@ typedef uint32_t gpio_t;
#define DAC_NUMOF (2U)
#ifndef DOXYGEN
/**
* @brief Override GPIO modes
* @{
*/
#define HAVE_GPIO_MODE_T
typedef enum {
GPIO_IN = GPIO_MODE(0, 0, 0), /**< IN */
@ -131,19 +119,13 @@ typedef enum {
GPIO_OD = GPIO_MODE(1, 0, 1), /**< OD */
GPIO_OD_PU = GPIO_MODE(1, 1, 1), /**< OD with pull-up */
} gpio_mode_t;
/** @} */
/**
* @brief Override flank configuration values
* @{
*/
#define HAVE_GPIO_FLANK_T
typedef enum {
GPIO_RISING = 1, /**< emit interrupt on rising flank */
GPIO_FALLING = 2, /**< emit interrupt on falling flank */
GPIO_BOTH = 3 /**< emit interrupt on both flanks */
} gpio_flank_t;
/** @} */
#endif /* ndef DOXYGEN */
/**

5
cpu/samd21/include/periph_cpu.h
View File

@ -84,10 +84,6 @@ static inline int _sercom_id(SercomUsart *sercom)
}
#ifndef DOXYGEN
/**
* @brief Override the ADC resolution configuration
* @{
*/
#define HAVE_ADC_RES_T
typedef enum {
ADC_RES_6BIT = 0xff, /**< not supported */
@ -97,7 +93,6 @@ typedef enum {
ADC_RES_14BIT = 0xfe, /**< not supported */
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
/** @} */
#endif /* ndef DOXYGEN */
/**

4
cpu/samd5x/include/periph_cpu.h
View File

@ -93,7 +93,6 @@ typedef enum {
ADC_RES_14BIT = 0xfe, /**< not supported */
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
/** @} */
#endif /* DOXYGEN */
/**
@ -128,7 +127,6 @@ static const gpio_t rtc_tamper_pins[RTC_NUM_OF_TAMPERS] = {
/**
* @brief NVM User Page Mapping - Dedicated Entries
* Config values will be applied at power-on.
* @{
*/
struct sam0_aux_cfg_mapping {
/* config word 0 */
@ -162,7 +160,7 @@ struct sam0_aux_cfg_mapping {
};
/**
* @brief QSPI pins are fixed
* @name QSPI pins are fixed
* @{
*/
#define SAM0_QSPI_PIN_CLK GPIO_PIN(PB, 10) /**< Clock */

3
cpu/saml1x/include/periph_cpu.h
View File

@ -60,7 +60,6 @@ typedef enum {
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
#endif /* ndef DOXYGEN */
/** @} */
/**
* @brief The MCU has a 10 bit DAC
@ -94,7 +93,6 @@ static const gpio_t rtc_tamper_pins[RTC_NUM_OF_TAMPERS] = {
/**
* @brief NVM User Row Mapping - Dedicated Entries
* Config values will be applied at power-on.
* @{
*/
struct sam0_aux_cfg_mapping {
/* config word 0 */
@ -138,7 +136,6 @@ struct sam0_aux_cfg_mapping {
/* config word 7 */
uint32_t user_crc; /**< CRC of NVM User Row bits 223:64 (words 2…6) */
};
/** @} */
#ifdef __cplusplus
}

1
cpu/saml21/include/periph_cpu.h
View File

@ -60,7 +60,6 @@ typedef enum {
ADC_RES_14BIT = 0xfe, /**< not supported */
ADC_RES_16BIT = 0xfd /**< not supported */
} adc_res_t;
/** @} */
#endif /* ndef DOXYGEN */
/**