From 480e22be6637bdf48d749fafed852070cdd5d470 Mon Sep 17 00:00:00 2001
From: Jean-Pierre De Jesus DIAZ <me@jeandudey.tech>
Date: Sun, 5 Sep 2021 20:39:51 +0200
Subject: [PATCH] cpu/sam*: fix doxygen grouping warnings

Signed-off-by: Jean-Pierre De Jesus DIAZ <me@jeandudey.tech>
---
 cpu/sam3/include/periph_cpu.h   | 24 +++---------------------
 cpu/samd21/include/periph_cpu.h |  5 -----
 cpu/samd5x/include/periph_cpu.h |  4 +---
 cpu/saml1x/include/periph_cpu.h |  3 ---
 cpu/saml21/include/periph_cpu.h |  1 -
 5 files changed, 4 insertions(+), 33 deletions(-)

diff --git a/cpu/sam3/include/periph_cpu.h b/cpu/sam3/include/periph_cpu.h
index 7872489a02..973460a4be 100644
--- a/cpu/sam3/include/periph_cpu.h
+++ b/cpu/sam3/include/periph_cpu.h
@@ -28,25 +28,17 @@
 extern "C" {
 #endif
 
-/**
- * @brief Overwrite the default gpio_t type definition
- */
+#ifndef DOXYGEN
 #define HAVE_GPIO_T
 typedef uint32_t gpio_t;
-/** @} */
 
-/**
- * @brief Definition of a fitting UNDEF value
- */
 #define GPIO_UNDEF          (0xffffffff)
 
-/**
- * @brief Define a CPU specific GPIO pin generator macro
- */
 #define GPIO_PIN(x, y)      (((uint32_t)PIOA + (x << 9)) | y)
+#endif /* DOXYGEN */
 
 /**
- * @brief Declare needed generic SPI functions
+ * @name Declare needed generic SPI functions
  * @{
  */
 #define PERIPH_SPI_NEEDS_INIT_CS
@@ -118,10 +110,6 @@ typedef uint32_t gpio_t;
 #define DAC_NUMOF           (2U)
 
 #ifndef DOXYGEN
-/**
- * @brief   Override GPIO modes
- * @{
- */
 #define HAVE_GPIO_MODE_T
 typedef enum {
     GPIO_IN    = GPIO_MODE(0, 0, 0),    /**< IN */
@@ -131,19 +119,13 @@ typedef enum {
     GPIO_OD    = GPIO_MODE(1, 0, 1),    /**< OD */
     GPIO_OD_PU = GPIO_MODE(1, 1, 1),    /**< OD with pull-up */
 } gpio_mode_t;
-/** @} */
 
-/**
- * @brief Override flank configuration values
- * @{
- */
 #define HAVE_GPIO_FLANK_T
 typedef enum {
     GPIO_RISING = 1,        /**< emit interrupt on rising flank */
     GPIO_FALLING = 2,       /**< emit interrupt on falling flank */
     GPIO_BOTH = 3           /**< emit interrupt on both flanks */
 } gpio_flank_t;
-/** @} */
 #endif /* ndef DOXYGEN */
 
 /**
diff --git a/cpu/samd21/include/periph_cpu.h b/cpu/samd21/include/periph_cpu.h
index e52e21d2c6..8b84ab4beb 100644
--- a/cpu/samd21/include/periph_cpu.h
+++ b/cpu/samd21/include/periph_cpu.h
@@ -84,10 +84,6 @@ static inline int _sercom_id(SercomUsart *sercom)
 }
 
 #ifndef DOXYGEN
-/**
- * @brief   Override the ADC resolution configuration
- * @{
- */
 #define HAVE_ADC_RES_T
 typedef enum {
     ADC_RES_6BIT  = 0xff,                       /**< not supported */
@@ -97,7 +93,6 @@ typedef enum {
     ADC_RES_14BIT = 0xfe,                       /**< not supported */
     ADC_RES_16BIT = 0xfd                        /**< not supported */
 } adc_res_t;
-/** @} */
 #endif /* ndef DOXYGEN */
 
 /**
diff --git a/cpu/samd5x/include/periph_cpu.h b/cpu/samd5x/include/periph_cpu.h
index 6cc5000db3..ce20777e76 100644
--- a/cpu/samd5x/include/periph_cpu.h
+++ b/cpu/samd5x/include/periph_cpu.h
@@ -93,7 +93,6 @@ typedef enum {
     ADC_RES_14BIT = 0xfe,                       /**< not supported */
     ADC_RES_16BIT = 0xfd                        /**< not supported */
 } adc_res_t;
-/** @} */
 #endif /* DOXYGEN */
 
 /**
@@ -128,7 +127,6 @@ static const gpio_t rtc_tamper_pins[RTC_NUM_OF_TAMPERS] = {
 /**
  * @brief   NVM User Page Mapping - Dedicated Entries
  *          Config values will be applied at power-on.
- * @{
  */
 struct sam0_aux_cfg_mapping {
     /* config word 0 */
@@ -162,7 +160,7 @@ struct sam0_aux_cfg_mapping {
 };
 
 /**
- * @brief   QSPI pins are fixed
+ * @name QSPI pins are fixed
  * @{
  */
 #define SAM0_QSPI_PIN_CLK       GPIO_PIN(PB, 10)    /**< Clock        */
diff --git a/cpu/saml1x/include/periph_cpu.h b/cpu/saml1x/include/periph_cpu.h
index 6a060ef98a..453032c2b3 100644
--- a/cpu/saml1x/include/periph_cpu.h
+++ b/cpu/saml1x/include/periph_cpu.h
@@ -60,7 +60,6 @@ typedef enum {
     ADC_RES_16BIT = 0xfd                        /**< not supported */
 } adc_res_t;
 #endif /* ndef DOXYGEN */
-/** @} */
 
 /**
  * @brief   The MCU has a 10 bit DAC
@@ -94,7 +93,6 @@ static const gpio_t rtc_tamper_pins[RTC_NUM_OF_TAMPERS] = {
 /**
  * @brief   NVM User Row Mapping - Dedicated Entries
  *          Config values will be applied at power-on.
- * @{
  */
 struct sam0_aux_cfg_mapping {
     /* config word 0 */
@@ -138,7 +136,6 @@ struct sam0_aux_cfg_mapping {
     /* config word 7 */
     uint32_t user_crc;            /**< CRC of NVM User Row bits 223:64 (words 2…6)      */
 };
-/** @} */
 
 #ifdef __cplusplus
 }
diff --git a/cpu/saml21/include/periph_cpu.h b/cpu/saml21/include/periph_cpu.h
index 9bf0dd50e6..7fcb7d7987 100644
--- a/cpu/saml21/include/periph_cpu.h
+++ b/cpu/saml21/include/periph_cpu.h
@@ -60,7 +60,6 @@ typedef enum {
     ADC_RES_14BIT = 0xfe,                       /**< not supported */
     ADC_RES_16BIT = 0xfd                        /**< not supported */
 } adc_res_t;
-/** @} */
 #endif /* ndef DOXYGEN */
 
 /**