2020-05-26 11:12:06 +02:00
|
|
|
CFLAGS += -DCPU_FAM_STM32$(call uppercase_and_underscore,$(CPU_FAM))
|
2020-05-03 14:35:01 +02:00
|
|
|
|
|
|
|
# For stm32 cpu's we use the generic stm32.ld linker script
|
|
|
|
LINKER_SCRIPT ?= stm32.ld
|
|
|
|
|
|
|
|
# Include riotboot specific variables
|
2020-05-03 15:26:34 +02:00
|
|
|
include $(RIOTCPU)/stm32/stm32_riotboot.mk
|
2020-05-03 14:35:01 +02:00
|
|
|
|
|
|
|
# Compute ROM_LEN and RAM_LEN
|
|
|
|
include $(RIOTCPU)/stm32/stm32_mem_lengths.mk
|
|
|
|
KB := 1024
|
|
|
|
ROM_LEN_K := $(shell echo $(ROM_LEN) | sed 's/K//')
|
2021-02-01 10:53:40 +01:00
|
|
|
RAM_LEN_K := $(shell echo $(RAM_LEN) | sed 's/K//')
|
2020-05-03 14:35:01 +02:00
|
|
|
|
2021-04-09 14:49:44 +02:00
|
|
|
ifneq (,$(filter w%,$(CPU_FAM)))
|
2021-07-21 11:27:00 +02:00
|
|
|
ifneq (,$(CPU2_RAM_LEN))
|
|
|
|
# adjust RAM_LEN and ROM_LEN according to CPU2 RAM_LEN and ROM_LEN
|
|
|
|
CPU2_RAM_LEN_K := $(shell echo $(CPU2_RAM_LEN) | sed 's/K//')
|
|
|
|
RAM_LEN := $(shell echo $$(( ($(RAM_LEN_K) - $(CPU2_RAM_LEN_K) ) * $(KB) )))
|
|
|
|
else
|
|
|
|
RAM_LEN := $(shell echo $$(( $(RAM_LEN_K) * $(KB) )) )
|
|
|
|
endif
|
|
|
|
ifneq (,$(CPU2_ROM_LEN))
|
|
|
|
CPU2_ROM_LEN_K := $(shell echo $(CPU2_ROM_LEN) | sed 's/K//')
|
|
|
|
FLASHSIZE := $(shell echo $$(( ($(ROM_LEN_K) - $(CPU2_ROM_LEN_K) )* $(KB) )) )
|
|
|
|
ROM_LEN := $(shell echo $$(( ($(ROM_LEN_K) - $(CPU2_ROM_LEN_K) ) ))K)
|
|
|
|
else
|
|
|
|
FLASHSIZE := $(shell echo $$(( $(ROM_LEN_K) * $(KB) )) )
|
|
|
|
endif
|
2020-05-03 14:35:01 +02:00
|
|
|
else
|
|
|
|
FLASHSIZE := $(shell echo $$(( $(ROM_LEN_K) * $(KB) )) )
|
2021-02-01 10:53:40 +01:00
|
|
|
RAM_LEN := $(shell echo $$(( $(RAM_LEN_K) * $(KB) )) )
|
2020-05-03 14:35:01 +02:00
|
|
|
endif
|
|
|
|
|
|
|
|
# Get CPU_LINE_ variable
|
2020-05-03 15:12:38 +02:00
|
|
|
include $(RIOTCPU)/stm32/stm32_line.mk
|
2020-05-03 14:35:01 +02:00
|
|
|
CPU_LINE ?= $(shell echo $(CPU_MODEL) | cut -c -9 | tr 'a-z-' 'A-Z_')xx
|
|
|
|
|
2021-10-12 20:00:19 +02:00
|
|
|
ifeq ($(CONFIG_RDP0),y)
|
|
|
|
CFLAGS += -DCONFIG_STM32_RDP=0
|
|
|
|
endif
|
|
|
|
ifeq ($(CONFIG_RDP1),y)
|
|
|
|
CFLAGS += -DCONFIG_STM32_RDP=1
|
|
|
|
endif
|
|
|
|
ifeq ($(CONFIG_RDP2),y)
|
|
|
|
CFLAGS += -DCONFIG_STM32_RDP=2
|
|
|
|
endif
|
|
|
|
|
2020-05-03 14:35:01 +02:00
|
|
|
# Set CFLAGS
|
|
|
|
CFLAGS += -D$(CPU_LINE) -DCPU_LINE_$(CPU_LINE)
|
|
|
|
CFLAGS += -DSTM32_FLASHSIZE=$(FLASHSIZE)U
|
|
|
|
|
|
|
|
info-stm32:
|
|
|
|
@$(COLOR_ECHO) "CPU: $(CPU_MODEL)"
|
|
|
|
@$(COLOR_ECHO) "\tLine: $(CPU_LINE)"
|
|
|
|
@$(COLOR_ECHO) "\tPin count:\t$(STM32_PINS)"
|
|
|
|
@$(COLOR_ECHO) "\tROM size:\t$(ROM_LEN) ($(FLASHSIZE) Bytes)"
|
2021-02-01 10:53:40 +01:00
|
|
|
@$(COLOR_ECHO) "\tRAM size:\t$(RAM_LEN_K)KiB"
|
|
|
|
|
2020-05-03 14:35:01 +02:00
|
|
|
ifneq (,$(CCMRAM_LEN))
|
|
|
|
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_ccmram_length=$(CCMRAM_LEN)
|
|
|
|
endif
|
2021-12-23 11:04:26 +01:00
|
|
|
ifneq (,$(SRAM4_LEN))
|
|
|
|
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_sram4_length=$(SRAM4_LEN)
|
|
|
|
endif
|
2020-05-03 14:35:01 +02:00
|
|
|
|
2023-07-22 17:31:50 +02:00
|
|
|
# if the board uses a FMC RAM, all 4 heaps have to be used even if
|
|
|
|
# some of them are not available
|
|
|
|
ifneq (,$(filter periph_fmc_sdram periph_fmc_nor_sram,$(USEMODULE)))
|
|
|
|
ifneq (,$(FMC_RAM_LEN))
|
|
|
|
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_fmc_ram_addr=$(FMC_RAM_ADDR)
|
|
|
|
LINKFLAGS += $(LINKFLAGPREFIX)--defsym=_fmc_ram_len=$(FMC_RAM_LEN)
|
|
|
|
CFLAGS += -DCPU_HAS_FMC_RAM=1
|
|
|
|
CFLAGS += -DNUM_HEAPS=4
|
|
|
|
endif
|
|
|
|
endif
|
|
|
|
|
2020-07-24 15:04:53 +02:00
|
|
|
VECTORS_O ?= $(BINDIR)/stm32_vectors/$(CPU_LINE).o
|
|
|
|
VECTORS_FILE = $(RIOTCPU)/stm32/vectors/$(CPU_LINE).c
|
|
|
|
BUILDDEPS += $(VECTORS_FILE)
|
|
|
|
|
|
|
|
# CPU_LINE must be exported only when building the vectors object file since
|
|
|
|
# the source filename to be built is built from the CPU_LINE content.
|
|
|
|
$(call target-export-variables,$(VECTORS_O),CPU_LINE)
|
|
|
|
|
|
|
|
# Add this define to skip the inclusion of the system_stm32xxxx.h header files
|
|
|
|
# which are only used for STM32 system includes and not of interest for RIOT.
|
|
|
|
CFLAGS += -D__SYSTEM_STM32$(call uppercase,$(CPU_FAM))XX_H
|
2023-07-05 08:59:17 +02:00
|
|
|
# C0, G0, H7, L5 and U5 use SYSTEM_STM32..XX_H instead
|
|
|
|
CFLAGS += -DSYSTEM_STM32$(call uppercase,$(CPU_FAM))XX_H
|
2020-07-24 15:04:53 +02:00
|
|
|
|
2021-11-16 11:40:56 +01:00
|
|
|
ifneq (,$(filter STM32F030x4 STM32MP157Cxx,$(CPU_LINE)))
|
2020-09-25 23:58:35 +02:00
|
|
|
STM32CMSIS_INCLUDE_DIR = $(RIOTCPU)/stm32/include/vendor/cmsis/$(CPU_FAM)/Include
|
2021-11-16 11:40:56 +01:00
|
|
|
else
|
2023-05-16 22:16:43 +02:00
|
|
|
STM32CMSIS_INCLUDE_DIR = $(BUILD_DIR)/stm32/cmsis/$(CPU_FAM)/Include
|
2020-09-25 23:58:35 +02:00
|
|
|
STM32FAM_INCLUDE_FILE = $(STM32CMSIS_INCLUDE_DIR)/stm32$(CPU_FAM)xx.h
|
|
|
|
INCLUDES += -I$(STM32CMSIS_INCLUDE_DIR)
|
|
|
|
endif
|
2020-07-23 16:48:28 +02:00
|
|
|
|
2020-07-24 15:04:53 +02:00
|
|
|
# Fetch all CMSIS headers using the package mechanism. This rule is called all
|
|
|
|
# the time to ensure it's correctly updated when versions in the packages are
|
|
|
|
# updated.
|
2021-11-16 11:40:56 +01:00
|
|
|
$(STM32FAM_INCLUDE_FILE): FORCE $(CLEAN)
|
|
|
|
$(Q)+$(MAKE) -f $(RIOTBASE)/cpu/stm32/Makefile.cmsis
|
2020-07-23 16:48:28 +02:00
|
|
|
|
2020-07-24 15:04:53 +02:00
|
|
|
# The vectors source file requires the family headers to be fetched before since
|
|
|
|
# it's generated from the CMSIS content
|
|
|
|
$(VECTORS_FILE): $(STM32FAM_INCLUDE_FILE)
|
2021-11-16 11:40:56 +01:00
|
|
|
$(Q)$(RIOTBASE)/cpu/stm32/dist/irqs/gen_vectors.py $(STM32CMSIS_INCLUDE_DIR) $(CPU_LINE)
|
2020-07-23 16:48:28 +02:00
|
|
|
|
2020-09-25 23:58:35 +02:00
|
|
|
ifeq (,$(filter STM32MP157Cxx STM32F030x4,$(CPU_LINE)))
|
|
|
|
# IRQs of STM32F030x4 and STM32MP157Cxx lines are not available in the CMSIS
|
|
|
|
# package so they are hardcoded in RIOTs codebase.
|
2020-07-24 15:04:53 +02:00
|
|
|
# For other lines, the IRQs are automatically generated once from the whole
|
|
|
|
# list of CMSIS headers available in a given family
|
|
|
|
STM32IRQS_INCLUDE_FILE = $(RIOTCPU)/stm32/include/irqs/$(CPU_FAM)/irqs.h
|
|
|
|
BUILDDEPS += $(STM32IRQS_INCLUDE_FILE)
|
2020-09-25 23:58:35 +02:00
|
|
|
endif
|
2020-07-23 16:48:28 +02:00
|
|
|
|
2020-07-24 15:04:53 +02:00
|
|
|
# The IRQ header for a given family requires the family headers to be fetched
|
|
|
|
# before since it's generated from all CMSIS content of that family
|
|
|
|
$(STM32IRQS_INCLUDE_FILE): $(STM32FAM_INCLUDE_FILE)
|
2021-11-16 11:40:56 +01:00
|
|
|
$(Q)$(RIOTBASE)/cpu/stm32/dist/irqs/gen_irqs.py $(STM32CMSIS_INCLUDE_DIR) $(CPU_FAM)
|
2020-05-03 14:35:01 +02:00
|
|
|
|
2020-10-21 19:20:57 +02:00
|
|
|
# Include clock configuration directory
|
|
|
|
INCLUDES += -I$(RIOTCPU)/stm32/include/clk
|
|
|
|
|
2020-05-03 14:35:01 +02:00
|
|
|
include $(RIOTMAKE)/arch/cortexm.inc.mk
|