2020-11-21 00:53:29 +01:00
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/**
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* @defgroup boards_e180-zg120b-tb Ebyte E180-ZG120B-TB Test Board
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* @ingroup boards
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* @brief Support for Ebyte E180-ZG120B-TB Test Board
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## Overview
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2024-01-13 12:03:15 +01:00
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2020-11-21 00:53:29 +01:00
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Ebyte E180-ZG120B Test Board is equipped with the EFM32 microcontroller.
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It is specifically designed for low-power applications, having energy-saving
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peripherals, different energy modes and short wake-up times.
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## Hardware
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### MCU
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| MCU | EFR32MG1B232F256GM32 |
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|---------------|-----------------------------------------------------------------------------------------|
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| Family | ARM Cortex-M4F |
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| Vendor | Ebyte |
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| Vendor Family | EFM32 Mighty Gecko 1B |
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| RAM | 32.0 KiB (1.0 KiB reserved by radio blob) |
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| Flash | 256.0 KiB |
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| EEPROM | no |
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| Frequency | up to 38.4 MHz |
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| FPU | yes |
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| MPU | yes |
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| DMA | 8 channels |
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| Timers | 2x 16-bit + 1x 16-bit (low power) |
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| ADCs | 12-bit ADC |
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| UARTs | 2x USART, 1x LEUART |
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| SPIs | 2x USART |
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| I2Cs | 1x |
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| Vcc | 1.85 V - 3.8 V |
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| Datasheet | [Datasheet](https://www.silabs.com/documents/public/data-sheets/efr32mg1-datasheet.pdf) |
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| Manual | [Manual](https://www.silabs.com/documents/public/reference-manuals/efr32xg1-rm.pdf) |
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| Board Manual | [Board Manual](http://www.ebyte.com/en/downpdf.aspx?id=896) |
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2024-01-16 12:17:30 +01:00
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### Pin Mapping
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@warning At least for revision `10199-V1.0` of the test board most of the
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silkscreen labels are incorrect.
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@note Everything here assumes the board is oriented so that the USB connector
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is on the top.
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#### Right Header
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(Top-left pin is 1, top-right pin is 2, and so on.)
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| Description | Pin (left) | Pin (right) | Description |
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|:----------------------------- |:------------- |:------------- |:--------------------------------- |
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| GND | 1 | 2 | VCC |
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| PB13 | 3 | 4 | PB12 |
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| PB11 | 5 | 6 | PD15 |
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| NC (pin 8 on E180-ZG120B) | 7 | 8 | NC (pin 7 on E180-ZG120B) |
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| PA1 | 9 | 10 | PA0 |
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| PD14 | 11 | 12 | PD13 |
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| GND | 13 | 14 | GND |
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#### Top Header
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(Leftmost pin is 1, second from left is 2, and so on.)
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| Description | Pin (left to right) |
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|:----------------------------- |:--------------------- |
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| NC (pin 23 on E180-ZG120B) | 1 |
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| NC (pin 22 on E180-ZG120B) | 2 |
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| PC11 | 3 |
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| NC (pin 20 on E180-ZG120B) | 4 |
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| PF2 | 5 |
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| PC10 | 6 |
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| NC (pin 17 on E180-ZG120B) | 7 |
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| NC (pin 16 on E180-ZG120B) | 8 |
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| NC (pin 16 on E180-ZG120B) | 9 |
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#### Left Header
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(Top-left pin is 1, top-right pin is 2, and so on.)
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| Description | Pin (left) | Pin (right) | Description |
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|:----------------------------- |:------------- |:------------- |:----------------------------- |
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| NC (pin 24 on E180-ZG120B) | 1 | 2 | SWCLK |
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| SWDIO | 3 | 4 | PB14 |
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| PB15 | 5 | 6 | NC (pin 29 on E180-ZG120B) |
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| PF3 | 7 | 8 | NC (pin 31 on E180-ZG120B) |
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| NC (pin 32 on E180-ZG120) | 9 | 10 | NC (pin 33 on E180-ZG120B) |
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| NC (pin 34 on E180-ZG120) | 11 | 12 | NC (pin 35 on E180-ZG120B) |
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| GND | 13 | 14 | Reset |
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2020-11-21 00:53:29 +01:00
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### Peripheral mapping
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| Peripheral | Number | Hardware | Pins | Comments |
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|------------|---------|-----------------|-----------------------------|-----------------------------------------------------|
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| ADC | 0 | ADC0 | CHAN0: internal temperature | Ports are fixed, 14/16-bit resolution not supported |
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| HWCRYPTO | — | — | | AES128/AES256, SHA1, SHA256 |
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| RTT | — | RTCC | | 1 Hz interval. Either RTT or RTC (see below) |
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| RTC | — | RTCC | | 1 Hz interval. Either RTC or RTT (see below) |
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2023-05-01 21:16:11 +02:00
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| Timer | 0 | TIMER0 + TIMER1 | | TIMER0 is used as prescaler (must be adjacent) |
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| | 1 | LETIMER0 | | |
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| UART | 0 | USART0 | RX: PA1, TX: PA0 | Default STDIO output |
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### User interface
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| Peripheral | Mapped to | Pin | Comments |
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|------------|-----------|------|-----------------|
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| Button | PB0_PIN | PD15 | Mode Change |
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| | PB1_PIN | PD13 | Touch Link |
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| | PB2_PIN | PB11 | Baud Rate Reset |
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| LED | LED0_PIN | PF2 | GPIO2 LED |
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| | LED1_PIN | PF3 | Link LED |
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The fourth button with the Chinese description is the reset button.
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## Implementation Status
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| Device | ID | Supported | Comments |
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|------------------|-----------|-----------|----------------------------------------------------------------|
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| MCU | EFR32MG1B | yes | Power modes supported |
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| Low-level driver | ADC | yes | |
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| | Flash | yes | |
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| | GPIO | yes | Interrupts are shared across pins (see reference manual) |
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| | HW Crypto | yes | |
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| | I2C | yes | |
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| | PWM | yes | |
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| | RTCC | yes | As RTT or RTC |
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| | SPI | partially | Only master mode |
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| | Timer | yes | |
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| | UART | yes | USART is shared with SPI. LEUART baud rate limited (see below) |
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| | USB | no | |
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## Board configuration
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### Clock selection
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There are several clock sources that are available for the different
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peripherals. You are advised to read [AN0004.0](https://www.silabs.com/documents/public/application-notes/an0004.0-efm32-cmu.pdf)
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to get familiar with the different clocks.
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| Source | Internal | Speed | Comments |
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|--------|----------|----------------------------------|------------------------------------|
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| HFRCO | Yes | 19 MHz | Enabled during startup, changeable |
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| HFXO | No | 38.4 MHz | |
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| LFRCO | Yes | 32.768 kHz | |
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| LFXO | No | 32.768 kHz | |
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| ULFRCO | No | 1 kHz | Not very reliable as a time source |
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The sources can be used to clock following branches:
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| Branch | Sources | Comments |
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|--------|-------------------------|------------------------------|
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| HF | HFRCO, HFXO | Core, peripherals |
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| LFA | LFRCO, LFXO | Low-power timers |
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| LFB | LFRCO, LFXO, CORELEDIV2 | Low-power UART |
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| LFE | LFRCO, LFXO | Real-time Clock and Calendar |
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CORELEDIV2 is a source that depends on the clock source that powers the core.
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It is divided by 2 or 4 to not exceed maximum clock frequencies (EMLIB takes
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care of this).
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The frequencies mentioned in the tables above are specific for this starter
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kit.
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It is important that the clock speeds are known to the code, for proper
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calculations of speeds and baud rates. If the HFXO or LFXO are different from
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the speeds above, ensure to pass `EFM32_HFXO_FREQ=freq_in_hz` and
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`EFM32_LFXO_FREQ=freq_in_hz` to your compiler.
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You can override the branch's clock source by adding `CLOCK_LFA=source` to your
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compiler defines, e.g. `CLOCK_LFA=cmuSelect_LFRCO`.
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### Low-power peripherals
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The low-power UART is capable of providing an UART peripheral using a low-speed
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clock. When the LFB clock source is the LFRCO or LFXO, it can still be used in
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EM2. However, this limits the baud rate to 9600 baud. If a higher baud rate is
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desired, set the clock source to CORELEDIV2.
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**Note:** peripheral mappings in your board definitions will not be affected by
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this setting. Ensure you do not refer to any low-power peripherals.
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### RTC or RTT
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RIOT-OS has support for *Real-Time Tickers* and *Real-Time Clocks*.
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However, this board MCU family has support for a 32-bit *Real-Time Clock and
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Calendar*, which can be configured in ticker mode **or** calendar mode.
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Therefore, only one of both peripherals can be enabled at the same time.
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Configured at 1 Hz interval, the RTCC will overflow each 136 years.
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### Hardware crypto
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This MCU is equipped with a hardware-accelerated crypto peripheral that can
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speed up AES128, AES256, SHA1, SHA256 and several other cryptographic
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computations.
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A peripheral driver interface is proposed, but not yet implemented.
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### Usage of EMLIB
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This port makes uses of EMLIB by Ebyte to abstract peripheral registers.
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While some overhead is to be expected, it ensures proper setup of devices,
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provides chip errata and simplifies development. The exact overhead depends on
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the application and peripheral usage, but the largest overhead is expected
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during peripheral setup. A lot of read/write/get/set methods are implemented as
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inline methods or macros (which have no overhead).
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Another advantage of EMLIB are the included assertions. These assertions ensure
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that peripherals are used properly. To enable this, pass `DEBUG_EFM` to your
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compiler.
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### Pin locations
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The EFM32 platform supports peripherals to be mapped to different pins
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(predefined locations). The definitions in `periph_conf.h` mostly consist of a
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location number and the actual pins. The actual pins are required to configure
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the pins via GPIO driver, while the location is used to map the peripheral to
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these pins.
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In other words, these definitions must match. Refer to the data sheet for more
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information.
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This MCU has extended pin mapping support. Each pin of a peripheral can be
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connected separately to one of the predefined pins for that peripheral.
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## Flashing the device
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The board has no integrated programmer/debugger and no bootloader. Hence,
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an external SWD programmer/debugger such as the [SEGGER JLink][prog-jlink]
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or the [ST-Link][prog-stlink] is required. Connect at least the SWDIO, SWCLK,
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and GND to the programmer. If `JLinkExe` is found in `$PATH`, `jlink` is used
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by default for flashing, otherwise `openocd` is the default. When using OpenOCD,
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the `stlink` is the default for `OPENOCD_DEBUG_ADAPTER`; provide a different
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value if you use other hardware.
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@note When flashing with OpenOCD, leave the NRESET pin unconnected. The
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configuration does a soft reset only to work around an issue attaching
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with the hardware reset signal.
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[prog-jlink]: https://www.segger.com/jlink-software.html
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[prog-stlink]: https://www.aliexpress.com/wholesale?SearchText=stlink
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Flashing is supported by RIOT-OS using the command below:
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```
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make flash
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```
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To run the GDB debugger, use the command:
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```
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make debug
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```
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Or, to connect with your own debugger:
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```
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make debug-server
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```
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Some boards have (limited) support for emulation, which can be started with:
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```
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make emulate
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```
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## Supported Toolchains
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For using the Ebyte E180-ZG120B-TB starter kit we strongly recommend
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the usage of the [GNU Tools for ARM Embedded Processors](https://developer.arm.com/open-source/gnu-toolchain/gnu-rm)
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toolchain.
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## License information
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* Ebyte' EMLIB: zlib-style license (permits distribution of source).
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*/
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