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boards/e180-zg120b-tb: add initial support

This commit is contained in:
Bas Stottelaar 2020-11-21 00:53:29 +01:00
parent 3881b2f0cd
commit 57ffd66605
10 changed files with 628 additions and 0 deletions

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# Copyright (c) 2020 HAW Hamburg
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
config BOARD
default "e180-zg120b-tb" if BOARD_E180_ZG120B_TB
config BOARD_E180_ZG120B_TB
bool
default y
select BOARD_COMMON_SILABS
select CPU_MODEL_EFR32MG1B232F256GM32
select HAS_PERIPH_ADC
select HAS_PERIPH_RTC
select HAS_PERIPH_RTT
select HAS_PERIPH_TIMER
select HAS_PERIPH_UART
select HAS_PERIPH_UART_MODECFG
select HAS_EFM32_CORETEMP
select HAS_RIOTBOOT
source "$(RIOTBOARD)/common/silabs/Kconfig"

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MODULE = board
DIRS = $(RIOTBOARD)/common/silabs
include $(RIOTBASE)/Makefile.base

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ifneq (,$(filter saul_default,$(USEMODULE)))
USEMODULE += efm32_coretemp
USEMODULE += saul_gpio
endif
# add board common drivers
USEMODULE += boards_common_silabs
# include board common dependencies
include $(RIOTBOARD)/common/silabs/Makefile.dep

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CPU = efm32
CPU_FAM = efr32mg1b
CPU_MODEL = efr32mg1b232f256gm32
# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_adc
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_rtt
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart periph_uart_modecfg
# Put other features for this board (in alphabetical order)
FEATURES_PROVIDED += riotboot
FEATURES_PROVIDED += efm32_coretemp
include $(RIOTBOARD)/common/silabs/Makefile.features

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# set default port depending on operating system
PORT_LINUX ?= /dev/ttyUSB0
PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbmodem*)))
# setup serial terminal
include $(RIOTMAKE)/tools/serial.inc.mk
# setup JLink for flashing
JLINK_DEVICE = EFR32MG1BxxxF256
JLINK_PRE_FLASH = r
# include board common
include $(RIOTBOARD)/common/silabs/Makefile.include

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/*
* Copyright (C) 2015-2020 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_e180-zg120b-tb
* @{
*
* @file
* @brief Board specific implementations E180-ZG120B-TB board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Bas Stottelaar <basstottelaar@gmail.com>
*
* @}
*/
#include "board.h"
#include "board_common.h"
void board_init(void)
{
/* initialize the CPU */
cpu_init();
#ifndef RIOTBOOT
/* initialize the LEDs */
gpio_init(LED0_PIN, GPIO_OUT);
gpio_init(LED1_PIN, GPIO_OUT);
/* initialize the push buttons */
gpio_init(PB0_PIN, GPIO_IN);
gpio_init(PB1_PIN, GPIO_IN);
gpio_init(PB2_PIN, GPIO_IN);
#endif
}

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/**
* @defgroup boards_e180-zg120b-tb Ebyte E180-ZG120B-TB Test Board
* @ingroup boards
* @brief Support for Ebyte E180-ZG120B-TB Test Board
## Overview
Ebyte E180-ZG120B Test Board is equipped with the EFM32 microcontroller.
It is specifically designed for low-power applications, having energy-saving
peripherals, different energy modes and short wake-up times.
## Hardware
### MCU
| MCU | EFR32MG1B232F256GM32 |
|---------------|-----------------------------------------------------------------------------------------|
| Family | ARM Cortex-M4F |
| Vendor | Ebyte |
| Vendor Family | EFM32 Mighty Gecko 1B |
| RAM | 32.0 KiB (1.0 KiB reserved by radio blob) |
| Flash | 256.0 KiB |
| EEPROM | no |
| Frequency | up to 38.4 MHz |
| FPU | yes |
| MPU | yes |
| DMA | 8 channels |
| Timers | 2x 16-bit + 1x 16-bit (low power) |
| ADCs | 12-bit ADC |
| UARTs | 2x USART, 1x LEUART |
| SPIs | 2x USART |
| I2Cs | 1x |
| Vcc | 1.85 V - 3.8 V |
| Datasheet | [Datasheet](https://www.silabs.com/documents/public/data-sheets/efr32mg1-datasheet.pdf) |
| Manual | [Manual](https://www.silabs.com/documents/public/reference-manuals/efr32xg1-rm.pdf) |
| Board Manual | [Board Manual](http://www.ebyte.com/en/downpdf.aspx?id=896) |
### Peripheral mapping
| Peripheral | Number | Hardware | Pins | Comments |
|------------|---------|-----------------|-----------------------------|-----------------------------------------------------|
| ADC | 0 | ADC0 | CHAN0: internal temperature | Ports are fixed, 14/16-bit resolution not supported |
| HWCRYPTO | &mdash; | &mdash; | | AES128/AES256, SHA1, SHA256 |
| RTT | &mdash; | RTCC | | 1 Hz interval. Either RTT or RTC (see below) |
| RTC | &mdash; | RTCC | | 1 Hz interval. Either RTC or RTT (see below) |
| Timer | 0 | TIMER0 + TIMER1 | | TIMER0 is used as prescaler (must be adjecent) |
| | 1 | LETIMER0 | | |
| UART | 0 | USART0 | RX: PA1, TX: PA0 | Default STDIO output |
### User interface
| Peripheral | Mapped to | Pin | Comments |
|------------|-----------|------|-----------------|
| Button | PB0_PIN | PD15 | Mode Change |
| | PB1_PIN | PD13 | Touch Link |
| | PB2_PIN | PB11 | Baud Rate Reset |
| LED | LED0_PIN | PF2 | GPIO2 LED |
| | LED1_PIN | PF3 | Link LED |
The fourth button with the Chinese description is the reset button.
## Implementation Status
| Device | ID | Supported | Comments |
|------------------|-----------|-----------|----------------------------------------------------------------|
| MCU | EFR32MG1B | yes | Power modes supported |
| Low-level driver | ADC | yes | |
| | Flash | yes | |
| | GPIO | yes | Interrupts are shared across pins (see reference manual) |
| | HW Crypto | yes | |
| | I2C | yes | |
| | PWM | yes | |
| | RTCC | yes | As RTT or RTC |
| | SPI | partially | Only master mode |
| | Timer | yes | |
| | UART | yes | USART is shared with SPI. LEUART baud rate limited (see below) |
| | USB | no | |
## Board configuration
### Clock selection
There are several clock sources that are available for the different
peripherals. You are advised to read [AN0004.0](https://www.silabs.com/documents/public/application-notes/an0004.0-efm32-cmu.pdf)
to get familiar with the different clocks.
| Source | Internal | Speed | Comments |
|--------|----------|----------------------------------|------------------------------------|
| HFRCO | Yes | 19 MHz | Enabled during startup, changeable |
| HFXO | No | 38.4 MHz | |
| LFRCO | Yes | 32.768 kHz | |
| LFXO | No | 32.768 kHz | |
| ULFRCO | No | 1 kHz | Not very reliable as a time source |
The sources can be used to clock following branches:
| Branch | Sources | Comments |
|--------|-------------------------|------------------------------|
| HF | HFRCO, HFXO | Core, peripherals |
| LFA | LFRCO, LFXO | Low-power timers |
| LFB | LFRCO, LFXO, CORELEDIV2 | Low-power UART |
| LFE | LFRCO, LFXO | Real-time Clock and Calendar |
CORELEDIV2 is a source that depends on the clock source that powers the core.
It is divided by 2 or 4 to not exceed maximum clock frequencies (EMLIB takes
care of this).
The frequencies mentioned in the tables above are specific for this starter
kit.
It is important that the clock speeds are known to the code, for proper
calculations of speeds and baud rates. If the HFXO or LFXO are different from
the speeds above, ensure to pass `EFM32_HFXO_FREQ=freq_in_hz` and
`EFM32_LFXO_FREQ=freq_in_hz` to your compiler.
You can override the branch's clock source by adding `CLOCK_LFA=source` to your
compiler defines, e.g. `CLOCK_LFA=cmuSelect_LFRCO`.
### Low-power peripherals
The low-power UART is capable of providing an UART peripheral using a low-speed
clock. When the LFB clock source is the LFRCO or LFXO, it can still be used in
EM2. However, this limits the baud rate to 9600 baud. If a higher baud rate is
desired, set the clock source to CORELEDIV2.
**Note:** peripheral mappings in your board definitions will not be affected by
this setting. Ensure you do not refer to any low-power peripherals.
### RTC or RTT
RIOT-OS has support for *Real-Time Tickers* and *Real-Time Clocks*.
However, this board MCU family has support for a 32-bit *Real-Time Clock and
Calendar*, which can be configured in ticker mode **or** calendar mode.
Therefore, only one of both peripherals can be enabled at the same time.
Configured at 1 Hz interval, the RTCC will overflow each 136 years.
### Hardware crypto
This MCU is equipped with a hardware-accelerated crypto peripheral that can
speed up AES128, AES256, SHA1, SHA256 and several other cryptographic
computations.
A peripheral driver interface is proposed, but not yet implemented.
### Usage of EMLIB
This port makes uses of EMLIB by Ebyte to abstract peripheral registers.
While some overhead is to be expected, it ensures proper setup of devices,
provides chip errata and simplifies development. The exact overhead depends on
the application and peripheral usage, but the largest overhead is expected
during peripheral setup. A lot of read/write/get/set methods are implemented as
inline methods or macros (which have no overhead).
Another advantage of EMLIB are the included assertions. These assertions ensure
that peripherals are used properly. To enable this, pass `DEBUG_EFM` to your
compiler.
### Pin locations
The EFM32 platform supports peripherals to be mapped to different pins
(predefined locations). The definitions in `periph_conf.h` mostly consist of a
location number and the actual pins. The actual pins are required to configure
the pins via GPIO driver, while the location is used to map the peripheral to
these pins.
In other words, these definitions must match. Refer to the data sheet for more
information.
This MCU has extended pin mapping support. Each pin of a peripheral can be
connected separately to one of the predefined pins for that peripheral.
## Flashing the device
To flash, [SEGGER JLink](https://www.segger.com/jlink-software.html) is
required.
Flashing is supported by RIOT-OS using the command below:
```
make flash
```
To run the GDB debugger, use the command:
```
make debug
```
Or, to connect with your own debugger:
```
make debug-server
```
Some boards have (limited) support for emulation, which can be started with:
```
make emulate
```
## Supported Toolchains
For using the Ebyte E180-ZG120B-TB starter kit we strongly recommend
the usage of the [GNU Tools for ARM Embedded Processors](https://developer.arm.com/open-source/gnu-toolchain/gnu-rm)
toolchain.
## License information
* Ebyte' EMLIB: zlib-style license (permits distribution of source).
*/

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/*
* Copyright (C) 2015-2020 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_e180-zg120b-tb
* @{
*
* @file
* @brief Board specific definitions for the E180-ZG120B-TB starter kit
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Bas Stottelaar <basstottelaar@gmail.com>
*/
#ifndef BOARD_H
#define BOARD_H
#include "cpu.h"
#include "periph_conf.h"
#include "periph/gpio.h"
#include "periph/spi.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Xtimer configuration
*
* The timer runs at 250 kHz to increase accuracy, or at 32.768 kHz if
* LETIMER is used.
* @{
*/
#if IS_ACTIVE(CONFIG_EFM32_XTIMER_USE_LETIMER)
#define XTIMER_DEV (TIMER_DEV(1))
#define XTIMER_HZ (32768UL)
#define XTIMER_WIDTH (16)
#else
#define XTIMER_DEV (TIMER_DEV(0))
#define XTIMER_HZ (250000UL)
#define XTIMER_WIDTH (16)
#endif
#define XTIMER_CHAN (0)
/** @} */
/**
* @name Push button pin definitions
* @{
*/
#define PB0_PIN GPIO_PIN(PD, 15)
#define PB1_PIN GPIO_PIN(PD, 13)
#define PB2_PIN GPIO_PIN(PB, 11)
/** @} */
/**
* @name LED pin definitions
* @{
*/
#define LED0_PIN GPIO_PIN(PF, 2)
#define LED1_PIN GPIO_PIN(PF, 3)
/** @} */
/**
* @name Core temperature sensor configuration
*
* Connection to the on-chip temperature sensor.
* @{
*/
#define CORETEMP_ADC ADC_LINE(0)
/** @} */
/**
* @name Macros for controlling the on-board LEDs
* @{
*/
#define LED0_ON gpio_set(LED0_PIN)
#define LED0_OFF gpio_clear(LED0_PIN)
#define LED0_TOGGLE gpio_toggle(LED0_PIN)
#define LED1_ON gpio_set(LED1_PIN)
#define LED1_OFF gpio_clear(LED1_PIN)
#define LED1_TOGGLE gpio_toggle(LED1_PIN)
/** @} */
/**
* @brief Initialize the board (GPIO, sensors, clocks).
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H */
/** @} */

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/*
* Copyright (C) 2016-2020 Bas Stottelaar <basstottelaar@gmail.com>
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_e180-zg120b-tb
* @{
*
* @file
* @brief Board specific configuration of direct mapped GPIOs
*
* @author Bas Stottelaar <basstottelaar@gmail.com>
*/
#ifndef GPIO_PARAMS_H
#define GPIO_PARAMS_H
#include "board.h"
#include "saul/periph.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief GPIO pin configuration
*/
static const saul_gpio_params_t saul_gpio_params[] =
{
{
.name = "LED0",
.pin = LED0_PIN,
.mode = GPIO_OUT
},
{
.name = "LED1",
.pin = LED1_PIN,
.mode = GPIO_OUT
},
{
.name = "PB0",
.pin = PB0_PIN,
.mode = GPIO_IN_PU,
.flags = SAUL_GPIO_INVERTED,
},
{
.name = "PB1",
.pin = PB1_PIN,
.mode = GPIO_IN_PU,
.flags = SAUL_GPIO_INVERTED,
},
{
.name = "PB2",
.pin = PB2_PIN,
.mode = GPIO_IN_PU,
.flags = SAUL_GPIO_INVERTED,
},
};
#ifdef __cplusplus
}
#endif
#endif /* GPIO_PARAMS_H */
/** @} */

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/*
* Copyright (C) 2015-2020 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_e180-zg120b-tb
* @{
*
* @file
* @brief Configuration of CPU peripherals for the E180-ZG120B-TB
* Test Board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Bas Stottelaar <basstottelaar@gmail.com>
*/
#ifndef PERIPH_CONF_H
#define PERIPH_CONF_H
#include "cpu.h"
#include "periph_cpu.h"
#include "em_cmu.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Clock configuration
* @{
*/
#ifndef CLOCK_HF
#define CLOCK_HF cmuSelect_HFXO
#endif
#ifndef CLOCK_CORE_DIV
#define CLOCK_CORE_DIV cmuClkDiv_1
#endif
#ifndef CLOCK_LFA
#define CLOCK_LFA cmuSelect_LFRCO
#endif
#ifndef CLOCK_LFB
#define CLOCK_LFB cmuSelect_LFRCO
#endif
#ifndef CLOCK_LFE
#define CLOCK_LFE cmuSelect_LFRCO
#endif
/** @} */
/**
* @name ADC configuration
* @{
*/
static const adc_conf_t adc_config[] = {
{
.dev = ADC0,
.cmu = cmuClock_ADC0,
}
};
static const adc_chan_conf_t adc_channel_config[] = {
{
.dev = 0,
.input = adcPosSelTEMP,
.reference = adcRef1V25,
.acq_time = adcAcqTime8
},
{
.dev = 0,
.input = adcPosSelAVDD,
.reference = adcRef5V,
.acq_time = adcAcqTime8
}
};
#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
/** @} */
/**
* @name RTT configuration
* @{
*/
#define RTT_MAX_VALUE (0xFFFFFFFF)
#define RTT_FREQUENCY (1U)
/** @} */
/**
* @name Timer configuration
*
* The implementation uses two timers in cascade mode.
* @{
*/
static const timer_conf_t timer_config[] = {
{
.prescaler = {
.dev = TIMER0,
.cmu = cmuClock_TIMER0
},
.timer = {
.dev = TIMER1,
.cmu = cmuClock_TIMER1
},
.irq = TIMER1_IRQn,
.channel_numof = 3
},
{
.prescaler = {
.dev = NULL,
.cmu = cmuClock_LETIMER0
},
.timer = {
.dev = LETIMER0,
.cmu = cmuClock_LETIMER0
},
.irq = LETIMER0_IRQn,
.channel_numof = 2
}
};
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
#define TIMER_0_ISR isr_timer1
#define TIMER_1_ISR isr_letimer0
/** @} */
/**
* @name UART configuration
* @{
*/
static const uart_conf_t uart_config[] = {
{
.dev = USART0,
.rx_pin = GPIO_PIN(PA, 1),
.tx_pin = GPIO_PIN(PA, 0),
.loc = USART_ROUTELOC0_RXLOC_LOC0 |
USART_ROUTELOC0_TXLOC_LOC0,
.cmu = cmuClock_USART0,
.irq = USART0_RX_IRQn
}
};
#define UART_NUMOF ARRAY_SIZE(uart_config)
#define UART_0_ISR_RX isr_usart0_rx
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H */
/** @} */