<b>RIOT-Xtensa-ESP</b> is a bare metal implementation of <b>RIOT-OS</b> for <b>ESP32</b> SOCs which supports most features of RIOT-OS. The peripheral SPI and I2C interfaces allow to connect all external hardware modules supported by RIOT-OS, such as sensors and actuators. SPI interface can also be used to connect external IEEE802.15.4 modules to integrate ESP32 boards into a GNRC network.
Although the port does not use the official <b>ESP-IDF</b> (Espresso IoT Development Framework) SDK, it must be installed for compilation. The reason is that the port uses most of the <b>ESP32 SOC definitions</b> provided by the ESP-IDF header files. In addition, it needs the hardware abstraction library (libhal), and the <b>ESP32 WiFi stack binary</b> libraries which are part of the ESP-IDF SDK.
# <a name="esp32_short_configuration_reference"> Short Configuration Reference </a> [[TOC](#esp32_toc)]
The following table gives a short reference of all board configuration parameters used by the ESP32 port in alphabetical order.
[SPI1_SCK](#esp32_spi_interfaces) | GPIO used as SCK for SPI_DEV(1) | o
[SPI1_MOSI](#esp32_spi_interfaces) | GPIO used as MOSI for SPI_DEV(1) | o
[SPI1_MISO](#esp32_spi_interfaces) | GPIO used as MISO for SPI_DEV(1) | o
[SPI1_CS0](#esp32_spi_interfaces) | GPIO used as default CS for SPI_DEV(1) | o
[UART1_TXD](#esp32_uart_interfaces) | GPIO used as TxD for UART_DEV(1) | o
[UART1_RXD](#esp32_uart_interfaces) | GPIO used as RxD for UART_DEV(1) | o
[UART2_TXD](#esp32_uart_interfaces) | GPIO used as TxD for UART_DEV(2) | o
[UART2_RXD](#esp32_uart_interfaces) | GPIO used as RxD for UART_DEV(2) | o
</center>
<b>*Type:</b> m - mandatory, o - optional
The following table gives a short reference in alphabetical order of modules that can be enabled/disabled by board configurations and/or application's makefile using ```USEMODULE``` and ```DISABLE_MODULE```.
ESP32 is a low-cost, ultra-low-power, single or dual-core SoCs from Espressif Systems with integrated WiFi and dual-mode BT module. The processor core is based on the Tensilica Xtensa LX6 32-bit Controller Processor Core.
\anchor esp32_mcu
## <a name=esp32_features> Features of ESP32 </a> [[TOC](#esp32_toc)]
Power Consumption | 68 mA @ 240 MHz <br> 44 mA @ 160 MHz (34 mA @ 160 MHz single core) <br> 31 mA @ 80 MHz (25 mA @ 80 MHz single core) <br> 800 uA in light sleep mode <br> 10 uA in deep sleep mode | yes <br> yes <br> yes <br> yes <br> yes
@note Even if used ESP32 SoC is a dual-core version, RIOT-OS uses only one core.
Rather than using the ESP32 SoC directly, ESP32 boards use an [ESP32 module from Espressif](https://www.espressif.com/en/products/hardware/modules) which integrates additionally to the SoC some key components, like SPI flash memory, SPI RAM, or crystal oscillator. Some of these components are optional. A good overview about available modules can be found in the [Online documentation of ESP-IDF](https://docs.espressif.com/projects/esp-idf/en/latest/hw-reference/modules-and-boards.html#wroom-solo-and-wrover-modules).
Most common modules used by ESP32 boards are the [ESP32-WROOM-32](https://docs.espressif.com/projects/esp-idf/en/latest/hw-reference/modules-and-boards.html#esp32-wroom-32) and [ESP32-WROVER](https://docs.espressif.com/projects/esp-idf/en/latest/hw-reference/modules-and-boards.html#esp32-wrover).
## <a name="esp32_supported_features"> Features Supported by RIOT-OS </a> [[TOC](#esp32_toc)]
The RIOT-OS for ESP32 SoCs supports the following features at the moment:
For information about installing Docker on your host, refer to the appropriate manuals for your operating system. For example, the easiest way to install Docker on the Ubuntu/Debian system is:
### <a name="esp32_generating_docker_image"> Generating a riotdocker Image </a> [[TOC](#esp32_toc)]
A ```riotdocker``` fork that only installs the ```RIOT-Xtensa-ESP32-toolchain``` is available at [GitHub](https://github.com/gschorcht/riotdocker-Xtensa-ESP.git). After cloning this git repository, you can use branch ```esp32_only``` to generate a Docker image with a size of "only" 990 MByte:
A ```riotdocker``` version that contains the toolchains for all different RIOT platforms can be found at [GitHub](https://github.com/RIOT-OS/riotdocker). However, the Docker image generated from the this Docker file has a size of about 1.5 GByte.
Once a Docker image has been created, it can be started with the following commands while in the RIOT root directory:
@note RIOT's root directory ```/path/to/RIOT``` becomes visible as the home directory of the ```riotbuild``` user in the Docker image. That is, the output of compilations performed in RIOT Docker is also accessible on the host system.
Please refer the [RIOT wiki](https://github.com/RIOT-OS/RIOT/wiki/Use-Docker-to-build-RIOT) on how to use the Docker image to compile RIOT OS.
### <a name="esp32_using_existing_docker_image"> Using an Existing riotdocker Image </a> [[TOC](#esp32_toc)]
Alternatively, an existing Docker image from Docker Hub can be used. You can either pull and start the [schorcht/riotbuild_esp32](https://hub.docker.com/r/schorcht/riotbuild_esp32) Docker image which only contains the ```RIOT-Xtensa-ESP32-toolchain``` using
or the [riot/riotbuild](https://hub.docker.com/r/riot/riotbuild/) Docker image (size is about 1.5 GB) which contains the toolchains for all platforms using
### <a name="esp32_flashing_using_docker"> Make Process with Docker Image </a> [[TOC](#esp32_toc)]
Using Docker, the make process consists of the following two steps:
1. **making** the RIOT binary **within a RIOT Docker image**
2. **flashing** the RIOT binary using a flasher program **on the host system**
Once the RIOT Docker image has been started from RIOT's root directory, a RIOT application can be compiled inside the Docker using the make command as usual, for example:
```
make BOARD=esp32-esp-12x -C tests/shell ...
```
This will generate a RIOT binary in ELF format.
@note You can't use the ```flash``` target inside the Docker image.
The RIOT binary has to be flash outside docker on the host system. Since the Docker image was stared while in RIOT's root directory, the output of the compilations is also accessible on the host system. On the host system, the ```flash-only``` target can then be used to flash the binary.
```
make flash-only BOARD=esp32-esp-12x -C tests/shell
A more difficult way to install the toolchain is the manual installation of required components as described below.
@note To use the precompiled toolchain the following packages (Debian/Ubuntu) have to be installed:<br> ```build-essential``` ```cppcheck``` ```coccinelle``` ```curl``` ```doxygen``` ```git``` ```graphviz``` ```make``` ```pcregrep``` ```python``` ```python-serial``` ```python3``` ```python3-flake8``` ```unzip``` ```wget```
### <a name="esp32_installation_of_xtensa_gcc"> Installation of Xtensa GCC compiler suite </a> [[TOC](#esp32_toc)]
Xtensa GCC compiler for ESP32 can be downloaded and installed as precompiled binary archive from GitHub.
Since we only use a few header files, ESP-IDF does not need to be compiled in any way. To use the installed ESP-IDF, just set the variable ```ESP32_SDK_DIR``` accordingly.
esp_eth | Enable the Ethernet MAC (EMAC) interface as `netdev` network device, see section [Ethernet Network Interface](#esp32_ethernet_network_interface).
esp_gdb | Enable the compilation with debug information for debugging with [QEMU and GDB](#esp32_qemu_mode_and_gdb) (```QEMU=1```) or via [JTAG interface with OpenOCD](#esp32_jtag_debugging).
esp_i2c_hw | Use the hardware I2C implementation, see section [I2C Interfaces](#esp32_i2c_interfaces).
esp_idf_heap | Use the ESP-IDF heap implementation, see section [ESP-IDF Heap Implementation](#esp32_esp_idf_heap_implementation).
esp_now | Enable the built-in WiFi module with the ESP-NOW protocol as `netdev` network device, see section [ESP-NOW Network Interface](#esp32_esp_now_network_interface).
esp_wifi | Enable the built-in WiFi module as `netdev` network device in WPA2 personal mode, see section [WiFi Network Interface](#esp32_wifi_network_interface).
esp_wifi_enterprise | Enable the built-in WiFi module as `netdev` network device in WPA2 enterprise mode, see section [WiFi Network Interface](#esp32_wifi_network_interface).
For example, to activate the a SPIFFS drive in on-board flash memory, the makefile of application has simply to add the ```esp_spiffs``` module to ```USEMODULE``` make variable:
```
USEMODULE += esp_spiffs
```
Modules can be also be activated temporarily at the command line when calling the make command:
The ```FLASH_MODE``` make command variable determines the mode that is used for flash access in normal operation.
The flash mode determines whether 2 data lines (```dio``` and ```dout```) or 4 data lines (```qio``` and ```qout```) for addressing and data access. For each data line, one GPIO is required. Therefore, using ```qio``` or ```qout``` increases the performance of SPI Flash data transfers, but uses two additional GPIOs (GPIO9 and GPIO10). That is, in this flash modes these GPIOs are not available for other purposes. If you can live with lower flash data transfer rates, you should always use ```dio``` or ```dout``` to keep GPIO9 and GPIO10 free for other purposes.
For more information about these flash modes, refer the documentation of [esptool.py](https://github.com/espressif/esptool/wiki/SPI-Flash-Modes).
ESP-IDF SDK provides a complex heap implementation that supports multiple heap segments in different memory areas such as DRAM, IRAM, and PSRAM. Whenever you want to use these memory areas as heap, you have to use the heap implementation from the ESP-IDF SDK. ESP-IDF heap is not used by default. To use it, it has to be enabled by the the makefile of the application:
```
USEMODULE += esp_heap
```
@note
ESP-IDF heap implementation is used by default, when the following modules are used: ```esp_spi_ram```
\anchor esp32_comm_periph
# <a name="esp32_peripherals"> Common Peripherals </a> [[TOC](#esp32_toc)]
ESP32 is an SoC and has a lot of peripherals that are not all supported by the RIOT port. This section describs the supported peripherals and how they have to be configured.
<b>PU/PD:</b> these pins have software configurable pull-up/pull-down functionality.<br>
@note GPIOs that can be used as ADC channels are also available as low power digital inputs/outputs in deep sleep mode.
GPIO0, GPIO2 are bootstrapping pins which are used to boot ESP32 in different modes:
<center>
GPIO0 | GPIO2 | Mode
:----:|:-----:|------------------
1 | X | boot in FLASH mode to boot the firmware from flash (default mode)
0 | 0 | boot in UART mode for flashing the firmware
</center>
@note GPIO2 becomes the SPI MISO signal for boards that use the HSPI interface as SD-Card interface in 4-bit SD mode. On these boards all signals of the SD-Card interface are pulled up. Because of the bootstrapping functionality of GPIO2, it can become necessary to either press the **Boot** button, remove the SD card or remove the peripheral hardware to flash RIOT.
ESP32 integrates two 12-bit ADCs (ADC1 and ADC2) capable of measuring up to 18 analog signals in total. Most of these ADC channels are either connected to a number of integrated sensors like a Hall sensors, touch sensors and a temperature sensor or can be connected with certain GPIOs. Integrated sensors are disabled in RIOT's implementation and are not accessible. Thus, up to 18 GPIOs, can be used as ADC inputs:
The GPIOs that can be used as ADC channels for a given board are defined by the <b>```ADC_GPIOS```</b> macro in the board-specific peripheral configuration. This configuration can be changed by [application-specific configurations](#esp32_application_specific_configurations).
Example:
```
#define ADC_GPIOS { GPIO0, GPIO2, GPIO4 }
```
The order of the listed GPIOs determines the mapping between the RIOT's ADC lines and the GPIOs. The maximum number of GPIOs in the list is ```ADC_NUMOF_MAX``` which is defined to be 16.
<b>```ADC_NUMOF```</b> is determined automatically from ```ADC_GPIOS``` list and must not be changed.
@note
- ```ADC_GPIOS``` must be defined even if there are no GPIOs that could be used as ADC channels on the board. In this case, an empty list hast to be defined which just contains the curly braces.
- As long as the GPIOs listed in ADC_GPIOS are not initialized as ADC channels with the ```adc_init``` function, they can be used for other purposes.
For each ADC line, an attenuation of the input signal can be defined separately with the ```adc_set_attenuation```function.
```
extern int adc_set_attenuation(adc_t line, adc_attenuation_t atten);
```
This results in different full ranges of the measurable voltage at the input. The attenuation can be set to 0 dB, 3 dB, 6 dB and 11 dB, with 11 dB being the standard attenuation. Since an ADC input is measured against a reference voltage Vref of 1.1 V, approximately the following measurement ranges are given when using a corresponding attenuation:
11 dB (default) | 0 ... 3.3V | ADC_ATTENUATION_11_DB
</center>
@note The reference voltage Vref can vary from device to device in the range of 1.0V and 1.2V. The Vref of a device can be read with the ```adc_vref_to_gpio25``` function at GPIO 25.<br>
```
extern int adc_vref_to_gpio25 (void);
```
For that purpose GPIO25 is initialized automatically as ADC channel and is connected internally to Vref to measure the current voltage. Once the initialization is finished and the function returns with success, the current voltage can be read from GPIO25. The results of the ADC input can then be adjusted accordingly. The ```adc_vref_to_gpio25``` function can be used to determine the current voltage at ESP32.
ESP32 supports 2 DAC lines at GPIO25 and GPIO26. These DACs have a width of 8 bits and produce voltages in the range from 0 V to 3.3 V (VDD_A). The 16 bits DAC values given as parameter of function *dac_set* are down-scaled to 8 bit.
The GPIOs that can be used as DAC channels for a given board are defined by the <b>```DAC_GPIOS```</b> macro in the board-specific peripheral configuration. This configuration can be changed by [application-specific configurations](#esp32_application_specific_configurations).
Example:
```
#define DAC_GPIOS { GPIO25, GPIO26 }
```
The order of the listed GPIOs determines the mapping between the RIOT's DAC lines and the GPIOs. The maximum number of GPIOs in the list is ```DAC_NUMOF_MAX``` which is defined to be 16.
<b>```DAC_NUMOF```</b> is determined automatically from ```DAC_GPIOS``` list and must not be changed.
@note
- ```DAC_GPIOS``` must be defined even if there are no GPIOs that could be used as DAC channels on the board. In this case, an empty list hast to be defined which just contains the curly braces.
- As long as the GPIOs listed in ```DAC_GPIOS``` are not initialized as DAC channels with the ```dac_init``` function, they can be used for other purposes.
The ESP32 has two built-in I2C hardware interfaces that support I2C bus speed up to 400 kbps (```I2C_SPEED_FAST```).
The board-specific configuration of the I2C interface <b>```I2C_DEV(n)```</b> requires the definition of
- <b>```I2Cn_SPEED```</b>, the bus speed,
- <b>```I2Cn_SCL```</b>, the GPIO used as SCL signal, and
- <b>```I2Cn_SDA```</b>, the GPIO used as SDA signal,
where ```n``` can be 0 or 1. If they are not defined, the I2C interface ```I2C_DEV(n)``` is not used.
Example:
```
#define I2C0_SPEED I2C_SPEED_FAST
#define I2C0_SCL GPIO22
#define I2C0_SDA GPIO21
#define I2C1_SPEED I2C_SPEED_NORMAL
#define I2C1_SCL GPIO13
#define I2C1_SDA GPIO16
```
@note The configuration of the I2C interfaces ```I2C_DEV(n)``` must be in continuous ascending order of n.
<b>```I2C_NUMOF```</b> is determined automatically from board-specific peripheral definitions of ```I2Cn_SPEED```, ```I2Cn_SCK```, and ```I2Cn_SDA```.
The following table shows the default configuration of I2C interfaces used for a large number of boards. It can be changed by [application-specific configurations](#esp32_application_specific_configurations).
@note The GPIOs listed in the configuration are only initialized as I2C signals when the ```periph_i2c``` module is used. Otherwise they are not allocated and can be used for other purposes.
Beside the I2C hardware implementation, a I2C bit-banging protocol software implementation can be used. This implementation allows bus speeds up to 1 Mbps (```I2C_SPEED_FAST_PLUS```). It can be activated by adding
```
USEMODULE += esp_i2c_hw
```
to application's makefile. The Disadvantage of the software implementation is that it uses busy waiting.
@note The hardware implementation seems to be very poor and faulty. I2C commands in the I2C command pipeline are sporadically not executed. A number of ACK errors and timeouts caused by protocol errors are the result. The hardware implementation is recommended only if they can be tolerated. Therefore, the software implementation is used by default.
- one LED PWM controller (LEDPWM) with 16 channels, and
- two high-speed Motor Control PWM controllers (MCPWM) with 6 channels each.
The PWM implementation uses the ESP32's high-speed MCPWM modules. Reason is that the LED PWM controller only supports resolutions of powers of two.
ESP32 has 2 MCPWM modules, each with up to 6 channels (```PWM_CHANNEL_NUM_DEV_MAX```). Thus, the maximum number of PWM devices is 2 and the maximum total number of PWM channels is 12. These 2 MCPWM devices are used as RIOT PWM devices ```PWM_DEV(0)``` and ```PWM_DEV(1)```.
The GPIOs that can be used as PWM channels of RIOT's PWM devices are defined by the <b>```PWM0_GPIOS```</b> and <b>```PWM1_GPIOS```</b> macros in the board-specific peripheral configuration. This configuration can be changed by [application specific configurations](#esp32_application_specific_configurations).
Example:
```
#define PWM0_GPIOS { GPIO9, GPIO10 }
#define PWM1_GPIOS { }
```
The order of the listed GPIOs determines the mapping between RIOT's PWM channels and the GPIOs. Board definitions usually declare a number of GPIOs as PWM channels.
@note The definition of ```PWM0_GPIOS``` and ```PWM1_GPIOS``` can be omitted or empty. In the latter case, they must at least contain the curly braces. The corresponding PWM device can not be used in this case.
<b>```PWM_NUMOF```</b> is determined automatically from the PWM0_GPIOS and PWM1_GPIOS definitions and must not be changed.
@note As long as the GPIOs listed in ```PWM0_GPIOS``` and ```PMW1_GPIOS``` are not initialized as PWM channels with the ```pwm_init``` function, they are not allocated and can be used other purposes.
The pin configuration of ```VSPI``` interface and the ```HSPI``` interface can be changed by [application specific configurations](#esp32_application_specific_configurations).
- The configuration of the SPI interfaces ```SPI_DEV(n)``` should be in continuous ascending order of ```n```.
- The order in which the interfaces ```VSPI``` and ```HSPI``` are used doesn't matter. For example, while one board may only use the ```HSPI``` interface as ```SPI_DEV(0)```, another board may use the ```VSPI``` interface as ```SPI_DEV(0)``` and the ```HSPI``` interface as ```SPI_DEV(1)```.
- The GPIOs listed in the configuration are first initialized as SPI signals when the corresponding SPI interface is used by calling either the ```spi_init_cs``` function or the ```spi_acquire``` function. That is, they are not allocated as SPI signals before and can be used for other purposes as long as the SPI interface is not used.
- GPIO2 becomes the MISO signal in SPI mode on boards that use the HSPI as the SD card interface in 4-bit SD mode. Because of the bootstrapping functionality of the GPIO2, it can be necessary to either press the **Boot** button, remove the SD card or remove the peripheral hardware to flash RIOT.
<b>```SPI_NUMOF```</b> is determined automatically from the board-specific peripheral definitions of ```SPI_DEV(n)```.
The following table shows the pin configuration used for most boards, even though it **can vary** from board to board.
Some boards use the HSPI as SD-Card interface (SDIO) in 4-bit SD mode.
<center>
Device|Pin | SD 4-bit mode | SPI mode
:-----|:------:|:-------------:|:----------:
HSPI | GPIO14 | CLK | SCK
HSPI | GPIO15 | CMD | CS0
HSPI | GPIO2 | DAT0 | MISO
HSPI | GPIO4 | DAT1 | -
HSPI | GPIO12 | DAT2 | -
HSPI | GPIO13 | DAT3 | MOSI
</center>
On these boards, all these signals are pulled up. This may cause flashing problems due to the bootstrap function of the GPIO2 pin, see section [GPIO pins](#esp32_gpio_pins).
There are two different implementations for hardware timers.
- <b>Timer Module implementation</b>
It provides 4 high-speed timers, where 1 timer is used for system time. The remaining <b>3 timer devices</b> with <b>1 channel</b> each can be used as RIOT timer devices with a clock rate of 1 MHz.
- <b>Counter implementation</b>
It uses CCOUNT/CCOMPARE registers to implement <b>2 timer devices</b> with <b>1 channel</b> each and a clock rate of 1 MHz.
By default, the hardware timer module is used. To use the hardware counter implementation, add
```
USEMODULE += esp_hw_counter
```
to application's makefile.
Timers are MCU built-in features and not board-specific. There is nothing to be configured.
ESP32 supports up to three UART devices. ```UART_DEV(0)``` has a fixed pin configuration and is always available. All ESP32 boards use it as standard configuration for the console.
The pin configuration of ```UART_DEV(1)``` and ```UART_DEV(2)``` are defined in board specific peripheral configuration by
- <b>```UARTn_TXD```</b>, the GPIO used as TxD signal, and
- <b>```UARTn_RXD```</b>, the GPIO used as RxD signal,
where ```n``` can be 2 or 3. If they are not defined, the UART interface UART_DEV(n) is not used.
<b>```UART_NUMOF```</b> is determined automatically from the board-specific peripheral definitions of ```UARTn_TXD``` and ```UARTn_RXD``` and must not be changed.
The following default pin configuration of UART interfaces as used by a most boards can be overridden by the application, see section [Application-Specific Configurations](#esp32_application_specific_configurations).
The ESP32 can use external SPI RAM connected through the FSPI interface. For example, all boards that use the [ESP32-WROVER modules](https://www.espressif.com/en/products/hardware/modules) have already integrated such SPI RAM.
However, the external SPI RAM requires 4 data lines and thus can only be used in QOUT (quad output) or QIO (quad input/output) flash mode, which makes GPIO9 and GPIO10 unavailable for other purposes. Therefore, if needed, the SPI RAM must be explicitly enabled in the makefile of the application.
```
USEMODULE += esp_spi_ram
```
@note
- When the SPI RAM is enabled using the ```esp_spi_ram```, the ESP32 uses four data lines to access the external SPI RAM in QOUT (quad output) flash mode. Therefore, GPIO9 and GPIO10 are used as SPI data lines and are not available for other purposes.
- Enabling SPI RAM for modules that don't have SPI RAM may lead to boot problems for some modules. For others is simply throws an error message.
The RIOT port for ESP32 implements a MTD system drive ```mtd0``` using the on-board SPI flash memory. This MTD system drive can be used together with SPIFFS and VFS to realize a persistent file system.
To use the MTD system drive with SPIFFS, the ```esp_spiffs``` module has to be enabled in the makefile of the application:
```
USEMODULE += esp_spiffs
```
When SPIFFS is enabled, the MTD system drive is formatted with SPIFFS the first time the system is started. The start address of the MTD system drive in the SPI flash memory is defined by the board configuration:
```
#define SPI_FLASH_DRIVE_START 0x200000
```
If this start address is set to 0, as in the default board configuration, the first possible multiple of 0x100000 (1 MByte) will be used in the free SPI flash memory determined from the partition table.
Please refer file ```$RIOTBASE/tests/unittests/test-spiffs/tests-spiffs.c``` for more information on how to use SPIFFS and VFS together with a MTD device ```mtd0``` alias ```MTD_0```.
ESP32 provides an <b>Ethernet MAC layer module (EMAC)</b> according to the IEEE 802.3 standard which can be used together with an external physical layer chip (PHY) to realize a 100/10 Mbps Ethernet interface. Supported PHY chips are the Microchip LAN8710/LAN8720, the IC Plus 101G, and the Texas Instruments TLK110.
The RIOT port for ESP32 realizes with module ```esp_eth``` a ```netdev``` driver for the EMAC which uses RIOT's standard Ethernet interface.
If the board has one of the supported PHY layer chips connected to the ESP32, the ```esp_eth``` module should be enabled by default in board's ```Makefile.dep``` when module ```netdev_default``` is used.
can be used simultaneously, for example, to realize a border router for
a mesh network which uses ESP-NOW.
### WPA2 Enterprise Mode
To use the WiFi `netdev` driver in WPA2 enterprise mode with IEEE 802.1X/EAP
authentication, module `esp_wifi_enterprise` has to be enabled.
```
USEMODULE += esp_wifi_enterprise
```
It supports the following EAP authentication methods:
- PEAPv0
- PEAPv1
- TTLS
As inner (phase 2) EAP authentication method, only MSCHAPv2 is supported.
To use module `esp_wifi_enterprise` with these authentication methods, the
following configuration parameters have to be defined:
<center>
Parameter | Default | Description
:------------------|:----------|:------------
ESP_WIFI_SSID | "RIOT_AP" | SSID of the AP to be used.
ESP_WIFI_EAP_ID | none | Optional anonymous identity used in phase 1 (outer) EAP authentication. If it is not defined, the user name defined for phase 2 (inner) EAP authentication is used as identity in phase 1.
ESP_WIFI_EAP_USER | none | User name used in phase 2 (inner) EAP authentication.
ESP_WIFI_EAP_PASS | none | Password used in phase 2 (inner) EAP authentication.
ESP_WIFI_STACKSIZE | #THREAD_STACKSIZE_DEFAULT | Stack size used for the WiFi netdev driver thread.
</center>
These configuration parameter definitions, as well as enabling the `esp_wifi`
module, can be done either in the makefile of the project or at make command
#ESP_WIFI_SSID | "RIOT_AP" | Static SSID definition for the SoftAP
#ESP_WIFI_AP_PREFIX | "RIOT_AP_" | Optional prefix for dynamic SSID, if used, the node will create the SSID based on the prefix + mac address (e.g.: "RIOT_AP_aabbccddeeff"). This is disabled by default and `ESP_WIFI_SSID` is used, define this to enable the usage of the SSID prefix.
#ESP_WIFI_PASS | none | The password for the WiFi SoftAP network interface. If no password is provided, the interface will be "open", otherwise it uses WPA2-PSK authentication mode.
#ESP_WIFI_SSID_HIDDEN | 0 | Whether the SoftAP SSID should be hidden.
#ESP_WIFI_MAX_CONN | 4 | The maximum number of connections for the SoftAP.
#ESP_WIFI_BEACON_INTERVAL | 100 | The beacon interval time in milliseconds for the SoftAP.
#ESP_WIFI_STACKSIZE | #THREAD_STACKSIZE_DEFAULT | Stack size used for the WiFi netdev driver thread.
</center>
These configuration parameter definitions, as well as enabling the `esp_wifi_ap`
module, can be done either in the makefile of the project or at make command
- The `esp_wifi_ap` module is not used by default when `netdev_default` is used.
- Supports open and WPA2-PSK authentication modes.
- The ESP-NOW network interface and the WiFi SoftAP network interface can not
be used simultaneously.
@warning
The SoftAP may or may not be at all reliable sometimes, this is a known
problem with the Wi-Fi network interface, even on the official ESP-IDF.
The problem is that the AP doesn't cache multicast data for connected
stations, and if stations connected to the AP are power save enabled,
they may experience multicast packet loss. This affects RIOT, because
NDP relies on multicast packets to work correctly.
Refer to the SDK documentation from Espressif on [AP Sleep](https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-guides/wifi.html#ap-sleep) for more information.
With ESP-NOW, the ESP32 provides a connectionless communication technology, featuring short packet transmission. It applies the IEEE802.11 Action Vendor frame technology, along with the IE function developed by Espressif, and CCMP encryption technology, realizing a secure, connectionless communication solution.
The RIOT port for ESP32 implements in module ```esp_now``` a ```netdev``` driver which uses ESP-NOW to provide a link layer interface to a meshed network of ESP32 nodes. In this network, each node can send short packets with up to 250 data bytes to all other nodes that are visible in its range.
For ESP-NOW, ESP32 nodes are used in WiFi SoftAP + Station mode to advertise their SSID and become visible to other ESP32 nodes. The SSID of an ESP32 node is the concatenation of the prefix ```RIOT_ESP_``` with the MAC address of its SoftAP WiFi interface. The driver periodically scans all visible ESP32 nodes.
The following parameters are defined for ESP-NOW nodes. These parameters can be overridden by [application-specific board configurations](#esp32_application_specific_board_configuration).
ESP_NOW_SOFT_AP_PASS | "ThisistheRIOTporttoESP" | Defines the passphrase as clear text (max. 64 chars) that is used for the SoftAP interface of ESP-NOW nodes. It has to be same for all nodes in one network.
ESP_NOW_CHANNEL | 6 | Defines the channel that is used as the broadcast medium by all nodes together.
ESP_NOW_KEY | NULL | Defines a key that is used for encrypted communication between nodes. If it is NULL, encryption is disabled. The key has to be of type ```uint8_t[16]``` and has to be exactly 16 bytes long.
## <a name="esp32_other_network_devices"> Other Network Devices </a> [[TOC](#esp32_toc)]
RIOT provides a number of driver modules for different types of network devices, e.g., IEEE 802.15.4 radio modules and Ethernet modules. The RIOT port for ESP32 has been tested with the following network devices:
- [mrf24j40](https://riot-os.org/api/group__drivers__mrf24j40.html) (driver for Microchip MRF24j40 based IEEE 802.15.4
- [enc28j60](https://riot-os.org/api/group__drivers__enc28j60.html) (driver for Microchip ENC28J60 based Ethernet modules)
### <a name="esp32_using_mrf24j40"> Using MRF24J40 (module ```mrf24j40```) </a> [[TOC](#esp32_toc)]
To use MRF24J40 based IEEE 802.15.4 modules as network device, the ```mrf24j40``` driver module has to be added to the makefile of the application:
```
USEMODULE += mrf24j40
```
The driver parameters that have to be defined by the board configuration for the MRF24J40 driver module are:
Parameter | Description
-----------------------|------------
MRF24J40_PARAM_CS | GPIO used as CS signal
MRF24J40_PARAM_INT | GPIO used as interrupt signal
MRF24J40_PARAM_RESET | GPIO used as reset signal
Since each board has different GPIO configurations, refer to the board documentation for the GPIOs recommended for the MRF24J40.
@note The reset signal of the MRF24J40 based network device can be connected with the ESP32 RESET/EN pin which is broken out on most boards. This keeps the GPIO free defined by ```MRF24J40_PARAM_RESET``` free for other purposes.
### <a name="esp32_using_enc28j60"> Using ENC28J60 (module ```enc28j60```) </a> [[TOC](#esp32_toc)]
To use ENC28J60 Ethernet modules as network device, the ```enc28j60``` driver module has to be added to the makefile of the application:
```
USEMODULE += enc28j60
```
The parameters that have to be defined by board configuration for the ENC28J60 driver module are:
Parameter | Description
---------------------|------------
ENC28J60_PARAM_CS | GPIO used as CS signal
ENC28J60_PARAM_INT | GPIO used as interrupt signal
ENC28J60_PARAM_RESET | GPIO used as reset signal
Since each board has different GPIO configurations, refer to the board documentation for the GPIOs recommended for the ENC28J60.
@note The reset signal of the ENC28J60 based network device can be connected with the ESP32 RESET/EN pin which is broken out on most boards. This keeps the GPIO free defined by ```ENC28J60_PARAM_RESET``` free for other purposes.
The board-specific configuration files ```board.h``` and ```periph_conf.h``` as well well as the driver parameter configuration files ```<driver>_params.h``` define the default configurations for peripherals and device driver modules. These are, for example, the GPIOs used, bus interfaces used or available bus speeds. Because there are many possible configurations and many different application requirements, these default configurations are usually only a compromise between different requirements.
Therefore, it is often necessary to change some of these default configurations for individual applications. For example, while many PWM channels are needed in one application, another application does not need PWM channels, but many ADC channels.
There are two ways to give the application the ability to change some of these default configurations:
When a larger number of board definitions needs be overridden, this approach becomes impractical. In that case, an application-specific board configuration file located in application directory can be used, see sections below.
To override default board configurations, simply create an application-specific board configuration file ```$APPDIR/board.h``` in the source directory ```$APPDIR``` of the application and add the definitions to be overridden. To force the preprocessor to include board's original ```board.h``` after that, add the ```include_next``` preprocessor directive as the <b>last</b> line.
For example to override the default definition of the GPIOs that are used as PWM channels, the application-specific board configuration file ```$APPDIR/board.h``` could look like the following:
It is important to ensure that the application-specific board configuration ```$APPDIR/board.h``` is included first. Insert the following line as the <b>first</b> line to the application makefile ```$APPDIR/Makefile```.
```
INCLUDES += -I$(APPDIR)
```
@note To make such application-specific board configurations dependent on the ESP32 MCU or a particular ESP32 board, you should always enclose these definitions in the following constructs
Using the approach for overriding board configurations, the parameters of drivers that are typically defined in ```drivers/<device>/include/<device>_params.h``` can be overridden. For that purpose just create an application-specific driver parameter file ```$APPDIR/<device>_params.h``` in the source directory ```$APPDIR``` of the application and add the definitions to be overridden. To force the preprocessor to include driver's original ```<device>_params.h``` after that, add the ```include_next``` preprocessor directive as the <b>last</b> line.
For example, to override a GPIO used for LIS3DH sensor, the application-specific driver parameter file ```$APPDIR/<device>_params.h``` could look like the following:
```
#ifdef CPU_ESP32
#define LIS3DH_PARAM_INT2 (GPIO_PIN(0, 4))
#endif
#include_next "lis3dh_params.h"
```
It is important to ensure that the application-specific driver parameter file ```$APPDIR/<device>_params.h``` is included first. Insert the following line as the <b>first</b> line to the application makefile ```$APPDIR/Makefile```.
**Please note:** To make such application-specific board configurations dependent on the ESP32 MCU or a particular ESP32 board, you should always enclose these definitions in the following constructs:
ESP32 provides a JTAG interface at GPIOs 12 ... 15 for On-Chip Debugging.
ESP32 Pin | ESP32 signal name JTAG Signal
:-------------|:-----------
CHIP_PU | TRST_N
GPIO15 (MTDO) | TDO
GPIO12 (MTDI) | TDI
GPIO13 (MTCK) | TCK
GPIO14 (MTMS) | TMS
GND | GND
This JTAG interface can be used with OpenOCD and GDB to debug your software on instruction level. When you compile your software with debugging information (module ```esp_gdb```) you can also debug on source code level as well.
@note
When debugging, the GPIOs used for the JTAG interface must not be used for anything else.
Detailed information on how to configure the JTAG interface of the ESP32 and to setup of OpenOCD and GDB can be found in section JTAG Debugging in the [ESP-IDF Programming Guide](https://esp-idf.readthedocs.io/en/latest/api-guides/jtag-debugging/index.html).
## <a name="esp32_qemu_mode_and_gdb"> QEMU Mode and GDB </a> [[TOC](#esp32_toc)]
When you execute command ```make flash``` with QEMU mode enabled (```QEMU=1```), instead of loading the image to the target hardware, a binary image called ```esp32flash.bin``` is created in the target directory. Furthermore, two ROM binary files ```rom.bin``` and ```rom1.bin``` are copied to the target directory. This files file can then be used together with QEMU to debug the code in GDB.
The binary image can be compiled with debugging information using module ```esp_gdb``` or optimized without debugging information (default). The latter one is the default. The version with debugging information can be debugged in source code while the optimized version can only be debugged in assembler mode.
To use QEMU, you have to install QEMU for Xtensa with ESP32 machine implementation as following.
Once the compilation has been finished, QEMU for Xtensa with ESP32 machine implementation should be available in ```$HOME/esp/qemu-esp32``` and you can change to your application target directory to start it in one terminal window , for example
```
cd $HOME/src/RIOT-Xtensa-ESP/tests/shell/bin/esp32-generic
where ```$HOME/src/RIOT-Xtensa-ESP``` is the root directory of RIOT and ```tests/shell``` is the application.
@note
QEMU starts always the files ```esp32flash.bin```, ```rom.bin``` and ```rom1.bin``` in local directory. Therefore, Please make sure that you are in the correct destination directory before starting QEMU.
In the second terminal window, you can then start GDB and connect to the emulation for the example.
To start debugging, you have to connect to QEMU with command:
```
(gdb) target remote :1234
```
@note
QEMU for Xtensa ESP32 does not support interrupts. That is, once your application uses interrupts, e.g., timers, the application cannot be debugged using QEMU together with GDB.
