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https://github.com/RIOT-OS/RIOT.git
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fd105b7e77
This patch removes a largely redundant block of conditional includes. The removed includes are moved into the family specific headers so that the more specific headers may override defaults defined in the shared headers.
91 lines
2.9 KiB
C
91 lines
2.9 KiB
C
/*
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* Copyright (C) 2020 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_stm32
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* @{
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*
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* @file
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* @brief Main header for STM32F2/F4/F7 clock configuration
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef CLK_F2F4F7_CFG_CLOCK_DEFAULT_H
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#define CLK_F2F4F7_CFG_CLOCK_DEFAULT_H
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#include "cfg_clock_common_fx_gx_mp1_c0.h"
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#if defined(CPU_FAM_STM32F2)
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#include "f2f4f7/cfg_clock_default_120.h"
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#elif defined(CPU_FAM_STM32F4)
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#if defined(CPU_LINE_STM32F401xC) || defined(CPU_LINE_STM32F401xE)
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#include "f2f4f7/cfg_clock_default_84.h"
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#elif defined(CPU_LINE_STM32F410Cx) || defined(CPU_LINE_STM32F410Rx) || \
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defined(CPU_LINE_STM32F410Tx) || defined(CPU_LINE_STM32F411xE) || \
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defined(CPU_LINE_STM32F412Cx) || defined(CPU_LINE_STM32F412Rx) || \
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defined(CPU_LINE_STM32F412Vx) || defined(CPU_LINE_STM32F412Zx) || \
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defined(CPU_LINE_STM32F413xx) || defined(CPU_LINE_STM32F423xx)
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#include "f2f4f7/cfg_clock_default_100.h"
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#elif defined(CPU_LINE_STM32F405xx) || defined(CPU_LINE_STM32F407xx) || \
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defined(CPU_LINE_STM32F415xx) || defined(CPU_LINE_STM32F417xx) || \
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defined(CPU_LINE_STM32F427xx) || defined(CPU_LINE_STM32F437xx) || \
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defined(CPU_LINE_STM32F429xx) || defined(CPU_LINE_STM32F439xx) || \
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defined(CPU_LINE_STM32F446xx) || defined(CPU_LINE_STM32F469xx) || \
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defined(CPU_LINE_STM32F479xx)
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#include "f2f4f7/cfg_clock_default_180.h"
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#else
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#error "No clock configuration available for this F4 line"
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#endif
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#elif defined(CPU_FAM_STM32F7)
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#include "f2f4f7/cfg_clock_default_216.h"
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#else
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#error "No clock configuration available for this family"
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#endif
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/**
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* @name Clock values
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* @{
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*/
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#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE)
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#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSE)
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#else /* CONFIG_CLOCK_HSI */
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#define CLOCK_PLL_SRC (CONFIG_CLOCK_HSI)
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#endif
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HSI)
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#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSI)
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#elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE)
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#if !IS_ACTIVE(CONFIG_BOARD_HAS_HSE)
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#error "The board doesn't provide an HSE oscillator"
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#endif
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#define CLOCK_CORECLOCK (CONFIG_CLOCK_HSE)
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#elif IS_ACTIVE(CONFIG_USE_CLOCK_PLL)
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#define CLOCK_CORECLOCK (((CLOCK_PLL_SRC / CONFIG_CLOCK_PLL_M) * CONFIG_CLOCK_PLL_N) / CONFIG_CLOCK_PLL_P)
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#endif /* CONFIG_USE_CLOCK_PLL */
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#define CLOCK_PLLQ (((CLOCK_PLL_SRC / CONFIG_CLOCK_PLL_M) * CONFIG_CLOCK_PLL_N) / CONFIG_CLOCK_PLL_Q)
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#define CLOCK_AHB CLOCK_CORECLOCK
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#define CLOCK_APB1 (CLOCK_CORECLOCK / CONFIG_CLOCK_APB1_DIV)
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#define CLOCK_APB2 (CLOCK_CORECLOCK / CONFIG_CLOCK_APB2_DIV)
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/** @} */
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* CLK_F2F4F7_CFG_CLOCK_DEFAULT_H */
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/** @} */
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