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41 lines
983 B
Plaintext
41 lines
983 B
Plaintext
# Copyright (c) 2020 HAW Hamburg
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# 2022 Gunar Schorcht
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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# General Public License v2.1. See the file LICENSE in the top level
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# directory for more details.
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config CPU
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default "esp32" if HAS_CPU_ESP32
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config CPU_CORE_XTENSA_LX6
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bool
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select CPU_ARCH_XTENSA
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help
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CPU core of the ESP32x SoC is a Xtensa LX6.
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config CPU_CORE_XTENSA_LX7
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bool
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select CPU_ARCH_XTENSA
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help
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CPU core of the ESP32x SoC is a Xtensa LX7.
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config CPU_CORE_RV32IMC
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bool
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select CPU_ARCH_RISCV
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help
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CPU core of the ESP32x SoC is a RISC-V core.
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config CPU_CORE
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default "xtensa-lx6" if CPU_CORE_XTENSA_LX6
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default "xtensa-lx7" if CPU_CORE_XTENSA_LX7
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default "rv32imc" if CPU_CORE_RV32IMC
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rsource "Kconfig.esp32x"
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rsource "Kconfig.esp32"
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rsource "Kconfig.esp32c3"
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rsource "Kconfig.esp32s3"
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rsource "Kconfig.esp32s2"
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source "$(RIOTCPU)/esp_common/Kconfig"
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