mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
54b57bd97f
since c05984b341 the prescaler in the timer
config struct is no longer used.
Let's remove it.
77 lines
1.7 KiB
C
77 lines
1.7 KiB
C
/*
|
|
* Copyright (C) 2016 Kees Bakker, SODAQ
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU Lesser
|
|
* General Public License v2.1. See the file LICENSE in the top level
|
|
* directory for more details.
|
|
*/
|
|
|
|
/**
|
|
* @ingroup boards_sodaq-autonomo
|
|
* @{
|
|
*
|
|
* @file
|
|
* @brief Default timer configuration for SODAQ boards
|
|
*
|
|
* @author Kees Bakker <kees@sodaq.com>
|
|
*/
|
|
|
|
#ifndef CFG_TIMER_DEFAULT_H
|
|
#define CFG_TIMER_DEFAULT_H
|
|
|
|
#include <stdint.h>
|
|
|
|
#include "cpu.h"
|
|
#include "periph_cpu.h"
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
/**
|
|
* @name Timer peripheral configuration
|
|
* @{
|
|
*/
|
|
static const tc32_conf_t timer_config[] = {
|
|
{ /* Timer 0 - System Clock */
|
|
.dev = TC3,
|
|
.irq = TC3_IRQn,
|
|
.pm_mask = PM_APBCMASK_TC3,
|
|
.gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
|
|
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
|
.gclk_src = SAM0_GCLK_1MHZ,
|
|
#else
|
|
.gclk_src = SAM0_GCLK_MAIN,
|
|
#endif
|
|
.flags = TC_CTRLA_MODE_COUNT16,
|
|
},
|
|
{ /* Timer 1 */
|
|
.dev = TC4,
|
|
.irq = TC4_IRQn,
|
|
.pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
|
|
.gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
|
|
#if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
|
|
.gclk_src = SAM0_GCLK_1MHZ,
|
|
#else
|
|
.gclk_src = SAM0_GCLK_MAIN,
|
|
#endif
|
|
.flags = TC_CTRLA_MODE_COUNT32,
|
|
}
|
|
};
|
|
|
|
#define TIMER_0_MAX_VALUE 0xffff
|
|
|
|
/* interrupt function name mapping */
|
|
#define TIMER_0_ISR isr_tc3
|
|
#define TIMER_1_ISR isr_tc4
|
|
|
|
#define TIMER_NUMOF ARRAY_SIZE(timer_config)
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* CFG_TIMER_DEFAULT_H */
|
|
/** @} */
|