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dd0593a3c8
Setting the `RCU_CTL` register just to the IRC8M bit also removes the IRC8M calibration and trim adjust value in this register. Therefore IRC8M calibration and trim adjust value have to be preserved and the IRC8M has to be set.
90 lines
1.9 KiB
C
90 lines
1.9 KiB
C
/*
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* Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_seeedstudio-gd32
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* @{
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*
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* @file
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* @brief Board specific definitions for the SeeedStudio GD32 RISC-V board
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*
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* @author Koen Zandberg <koen@bergzand.net>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "macros/units.h"
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* This board provides an high frequency oscillator */
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#ifndef CONFIG_BOARD_HAS_HXTAL
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#define CONFIG_BOARD_HAS_HXTAL 1
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#endif
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#define CLOCK_HXTAL MHZ(8) /**< HXTAL frequency */
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#define CLOCK_CORECLOCK MHZ(108) /**< CPU clock frequency in Hz */
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/**
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* @name Timer configuration
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.dev = TIMER2,
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.max = 0x0000ffff,
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.rcu_mask = RCU_APB1EN_TIMER2EN_Msk,
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.bus = APB1,
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.irqn = TIMER2_IRQn
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},
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{
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.dev = TIMER3,
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.max = 0x0000ffff,
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.rcu_mask = RCU_APB1EN_TIMER3EN_Msk,
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.bus = APB1,
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.irqn = TIMER3_IRQn
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}
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};
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#define TIMER_0_IRQN TIMER2_IRQn
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#define TIMER_1_IRQN TIMER3_IRQn
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART0,
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.rcu_mask = RCU_APB2EN_USART0EN_Msk,
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.rx_pin = GPIO_PIN(PORT_A, 10),
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.tx_pin = GPIO_PIN(PORT_A, 9),
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.bus = APB2,
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.irqn = USART0_IRQn,
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},
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};
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#define UART_0_IRQN USART0_IRQn
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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