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69 lines
1.8 KiB
C
69 lines
1.8 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2014 PHYTEC Messtechnik GmbH
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* Copyright (C) 2017 Eistec AB
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup boards_frdm-k64f
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* @{
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*
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* @file
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* @brief Board specific implementations for the FRDM-K22F
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*
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* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
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*
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* @}
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*/
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#include <stdint.h>
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#include "board.h"
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#include "mcg.h"
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#include "periph/gpio.h"
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#define SIM_CLKDIV1_48MHZ (SIM_CLKDIV1_OUTDIV1(0) | \
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SIM_CLKDIV1_OUTDIV2(1) | \
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SIM_CLKDIV1_OUTDIV3(1) | \
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SIM_CLKDIV1_OUTDIV4(1))
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static void cpu_clock_init(void);
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void board_init(void)
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{
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/* initialize the clock system */
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cpu_clock_init();
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/* initialize the CPU core */
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cpu_init();
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/* initialize and turn off the on-board RGB-LED */
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gpio_init(LED0_PIN, GPIO_OUT);
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gpio_init(LED1_PIN, GPIO_OUT);
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gpio_init(LED2_PIN, GPIO_OUT);
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gpio_set(LED0_PIN);
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gpio_set(LED1_PIN);
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gpio_set(LED2_PIN);
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}
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/**
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* @brief Configure the controllers clock system
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*
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* | Clock name | Run mode frequency (max) | VLPR mode frequency (max) |
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*
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* | Core | 120 MHz | 4 MHz |
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* | System | 120 MHz | 4 MHz |
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* | Bus | 60 MHz | 4 MHz |
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* | FlexBus | 30 MHz | 800 kHz |
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* | Flash | 26.67 MHz | 4 MHz |
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*/
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static void cpu_clock_init(void)
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{
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/* setup system prescalers */
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SIM->CLKDIV1 = (uint32_t)SIM_CLKDIV1_48MHZ;
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kinetis_mcg_set_mode(KINETIS_MCG_PEE);
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}
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