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126 lines
3.1 KiB
C
126 lines
3.1 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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* 2016 Laurent Navet <laurent.navet@gmail.com>
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* 2017 HAW Hamburg, Dimitri Nahm
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* 2018 Matthew Blue <matthew.blue.neuro@gmail.com>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_mega-xplained
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* @{
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*
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* @file
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* @brief Common configuration of MCU periphery for Mega Xplained
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*
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* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
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* @author Laurent Navet <laurent.navet@gmail.com>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Dimitri Nahm <dimitri.nahm@haw-hamburg.de>
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* @author Matthew Blue <matthew.blue.neuro@gmail.com>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock configuration
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*
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* Frequency of the internal 8MHz RC oscillator.
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*
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* @{
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*/
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#define CLOCK_CORECLOCK (8000000UL)
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/** @} */
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/**
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* @name Timer configuration
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*
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* The ATmega1284P has 4 timers. Timer0 and Timer2 are 8 Bit Timers.
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*
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* The timer driver only supports the two 16-bit timers (Timer1 and
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* Timer3), so those are the only ones we can use here.
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*
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* @{
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*/
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#define TIMER_NUMOF (2U)
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#define TIMER_0 MEGA_TIMER1
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#define TIMER_0_MASK &TIMSK1
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#define TIMER_0_FLAG &TIFR1
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#define TIMER_0_ISRA TIMER1_COMPA_vect
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#define TIMER_0_ISRB TIMER1_COMPB_vect
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#define TIMER_1 MEGA_TIMER3
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#define TIMER_1_MASK &TIMSK3
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#define TIMER_1_FLAG &TIFR3
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#define TIMER_1_ISRA TIMER3_COMPA_vect
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#define TIMER_1_ISRB TIMER3_COMPB_vect
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/** @} */
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/**
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* @name UART configuration
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*
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* The UART devices have fixed pin mappings, so all we need to do, is to specify
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* which devices we would like to use and their corresponding RX interrupts. See
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* the reference manual for the fixed pin mapping.
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*
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* @{
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*/
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#define UART_NUMOF (2U)
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#define UART_0 MEGA_UART0
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#define UART_0_ISR USART0_RX_vect
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#define UART_1 MEGA_UART1
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#define UART_1_ISR USART1_RX_vect
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/** @} */
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/**
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* @name SPI configuration
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*
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* The ATmega1284P has only one hardware SPI with fixed pin configuration, so
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* all we can do here, is to enable or disable it...
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*
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* The fixed pins used are:
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* MOSI - PB5 (pin 1)
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* MISO - PB6 (pin 2)
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* SCK - PB7 (pin 3)
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* SS - PB4 (pin 44) -> this pin is configured as output, but not used
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*
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* The SS pin must be configured as output for the SPI device to work as
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* master correctly, though we do not use it for now (as we handle the chip
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* select externally for now)
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*
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* @{
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*/
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#define SPI_NUMOF 1 /* set to 0 to disable SPI */
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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#define I2C_NUMOF 1
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/** @} */
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/**
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* @name ADC configuration
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* @{
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*/
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#define ADC_NUMOF (8U)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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