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boards/mega-xplained: Initial Mega1284P Xplained support
This commit is contained in:
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3
boards/mega-xplained/Makefile
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3
boards/mega-xplained/Makefile
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MODULE = board
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include $(RIOTBASE)/Makefile.base
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4
boards/mega-xplained/Makefile.dep
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4
boards/mega-xplained/Makefile.dep
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ifneq (,$(filter saul_default,$(USEMODULE)))
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USEMODULE += saul_adc
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USEMODULE += saul_gpio
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endif
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14
boards/mega-xplained/Makefile.features
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14
boards/mega-xplained/Makefile.features
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# Put defined MCU peripherals here (in alphabetical order)
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FEATURES_PROVIDED += periph_adc
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FEATURES_PROVIDED += periph_gpio
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FEATURES_PROVIDED += periph_i2c
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FEATURES_PROVIDED += periph_spi
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FEATURES_PROVIDED += periph_timer
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FEATURES_PROVIDED += periph_uart
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# Various other features (if any)
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# The board MPU family (used for grouping by the CI system)
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FEATURES_MCU_GROUP = avr8
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-include $(RIOTCPU)/atmega1284p/Makefile.features
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24
boards/mega-xplained/Makefile.include
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24
boards/mega-xplained/Makefile.include
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# define the cpu used by the Mega Xplained board
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export CPU = atmega1284p
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# configure the terminal program
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export PORT_LINUX ?= /dev/ttyACM0
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export PORT_DARWIN ?= $(firstword $(sort $(wildcard /dev/tty.usbserial*)))
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export BAUD ?= 9600
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include $(RIOTMAKE)/tools/serial.inc.mk
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export FLASHER = avrdude
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export DIST_PATH = $(RIOTBOARD)/$(BOARD)/dist
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export DEBUGSERVER_PORT = 4242
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export DEBUGSERVER = $(DIST_PATH)/debug_srv.sh
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export DEBUGSERVER_FLAGS = "-g -j usb :$(DEBUGSERVER_PORT)"
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export DEBUGGER_FLAGS = "-x $(RIOTBOARD)/$(BOARD)/dist/gdb.conf $(ELFFILE)"
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export DEBUGGER = $(DIST_PATH)/debug.sh $(DEBUGSERVER_FLAGS) $(DIST_PATH) $(DEBUGSERVER_PORT)
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# PROGRAMMER defaults to the Bus Pirate ISP
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export PROGRAMMER ?= buspirate
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export PROGRAMMER_FLAGS = -P /dev/ttyUSB0
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export OFLAGS += -j .text -j .data -O ihex
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export FFLAGS += -p m1284p -c $(PROGRAMMER) $(PROGRAMMER_FLAGS) -F -U flash:w:bin/$(BOARD)/$(PROJECT)$(APPLICATION).hex
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99
boards/mega-xplained/board.c
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99
boards/mega-xplained/board.c
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@ -0,0 +1,99 @@
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/*
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* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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* 2015 Kaspar Schleiser <kaspar@schleiser.de>
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* 2016 Laurent Navet <laurent.navet@gmail.com>
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* 2018 Matthew Blue <matthew.blue.neuro@gmail.com>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_mega-xplained
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* @{
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*
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* @file
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* @brief Board specific implementation for the Mega Xplained
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*
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* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
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* @author Kaspar Schleiser <kaspar@schleiser.de>
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* @author Laurent Navet <laurent.navet@gmail.com>
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* @author Matthew Blue <matthew.blu.neuro@gmail.com>
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*
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* @}
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*/
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#include <stdio.h>
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#include <avr/io.h>
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#include "board.h"
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#include "cpu.h"
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#include "uart_stdio.h"
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#include "periph/gpio.h"
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void SystemInit(void);
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static int uart_putchar(char c, FILE *stream);
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static int uart_getchar(FILE *stream);
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static void led_init(void);
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static FILE uart_stdout = FDEV_SETUP_STREAM(uart_putchar, NULL, _FDEV_SETUP_WRITE);
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static FILE uart_stdin = FDEV_SETUP_STREAM(NULL, uart_getchar, _FDEV_SETUP_READ);
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void board_init(void)
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{
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/* initialize stdio via USART_1 */
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SystemInit();
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/* initialize the CPU */
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cpu_init();
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/* initialize the LEDs */
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led_init();
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irq_enable();
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}
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/**
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* @brief Initialize the System, initialize IO via UART_1
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*/
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void SystemInit(void)
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{
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/* initialize UART_1 for use as stdout */
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uart_stdio_init();
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stdout = &uart_stdout;
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stdin = &uart_stdin;
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/* Flush stdout */
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puts("\f");
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}
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static int uart_putchar(char c, FILE *stream)
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{
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(void) stream;
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uart_stdio_write(&c, 1);
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return 0;
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}
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int uart_getchar(FILE *stream)
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{
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(void) stream;
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char c;
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uart_stdio_read(&c, 1);
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return (int)c;
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}
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/**
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* @brief Initialize the on-board LEDs
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*/
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void led_init(void)
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{
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/* LED0,2 currently unsupported due to lack of GPIO_OD support */
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LED1_ENABLE_PORT;
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LED1_OFF;
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LED3_ENABLE_PORT;
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LED3_OFF;
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}
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8
boards/mega-xplained/dist/debug.sh
vendored
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8
boards/mega-xplained/dist/debug.sh
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#!/usr/bin/env bash
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sleep 2
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setsid -w avarice $1 &
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#sleep 2 && $2/avr-gdb-wrapper -ex "target remote localhost:$3" $4
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sleep 3 && avr-gdb -ex "target remote localhost:$3" $4
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# avarice exits with 1 if the connection is released, therefore we always exit with 0
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exit 0
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7
boards/mega-xplained/dist/debug_srv.sh
vendored
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7
boards/mega-xplained/dist/debug_srv.sh
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#!/usr/bin/env bash
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sleep 2
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avarice $1
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# avarice exits with 1 if the connection is released, therefore we always exit with 0
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exit 0
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1
boards/mega-xplained/dist/gdb.conf
vendored
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1
boards/mega-xplained/dist/gdb.conf
vendored
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set $pc=0x00
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37
boards/mega-xplained/doc.txt
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37
boards/mega-xplained/doc.txt
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/**
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* @defgroup boards_mega-xplained Mega1284P-Xplained
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* @ingroup boards
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* @brief Support for the Mega1284P-Xplained board.
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*
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* ### General information
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*
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* The [Mega1284P-Xplained](http://www.microchip.com/DevelopmentTools/ProductDetails.aspx?PartNO=atmega1284p-xpld)
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* is an evaluation kit by Atmel (now Microchip) for their ATmega1284P microcontroller.
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*
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* ### Flash the board
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*
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* 1. The board may be flashed through JTAG or using a SPI ISP programmer. If
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* the Buspirate is being used, then `make flash` can be used to flash the
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* board:
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* ```
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* make BOARD=mega-xplained -C examples/hello-world flash
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* ```
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*
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* 2. The default fuse settings must also be changed.<br/>
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* If using the Buspirate:
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* ```
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* avrdude -p m1284p -c buspirate -P /dev/ttyUSB0 -U efuse:w:0xFF:m
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* avrdude -p m1284p -c buspirate -P /dev/ttyUSB0 -U hfuse:w:0x99:m
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* avrdude -p m1284p -c buspirate -P /dev/ttyUSB0 -U lfuse:w:0xE2:m
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* ```
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* WARNING: setting the fuses incorrectly can brick your board!
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*
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* ### Accessing STDIO via UART
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*
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* STDIO can be accessed through the USB connector. The on-board UART-USB
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* adapter is not affected by flashing. It shows up as /dev/ttyACM0 on Linux.
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* It will be used automatically with `make term`:
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* ```
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* make BOARD=mega-xplained -C examples/hello-world term
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* ```
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*/
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58
boards/mega-xplained/include/adc_params.h
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58
boards/mega-xplained/include/adc_params.h
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/*
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* Copyright (C) 2016 Eistec AB
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* 2018 Matthew Blue <matthew.blue.neuro@gmail.com>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_mega-xplained
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* @{
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*
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* @file
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* @brief Board specific configuration of direct mapped ADC
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*
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* @author Joakim Nohlgård <joakim.nohlgard@eistec.se>
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* @author Matthew Blue <matthew.blue.neuro@gmail.com>
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*/
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#ifndef ADC_PARAMS_H
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#define ADC_PARAMS_H
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#include "board.h"
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#include "saul/periph.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief ADC configuration
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*/
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static const saul_adc_params_t saul_adc_params[] =
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{
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{
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.name = "NTC thermistor",
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.line = NTC_OUTPUT,
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.res = ADC_RES_10BIT,
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},
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{
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.name = "Light sensor",
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.line = LIGHT_SENSOR_OUTPUT,
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.res = ADC_RES_10BIT,
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},
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{
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.name = "RC filter",
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.line = FILTER_OUTPUT,
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.res = ADC_RES_10BIT,
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}
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* ADC_PARAMS_H */
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/** @} */
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138
boards/mega-xplained/include/board.h
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138
boards/mega-xplained/include/board.h
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/*
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* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
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* 2016 Laurent Navet <laurent.navet@gmail.com>
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* 2018 Matthew Blue <matthew.blue.neuro@gmail.com>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/*
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* @ingroup boards_mega-xplained
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* @brief Support for the Mega Xplained board.
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* @{
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*
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* @file
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* @brief Board specific definitions for the Mega Xplained board.
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*
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* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
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* @author Laurent Navet <laurent.navet@gmail.com>
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* @author Matthew Blue <matthew.blue.neuro@gmail.com>
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*/
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#ifndef BOARD_H
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#define BOARD_H
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#include "cpu.h"
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#include "periph_cpu.h"
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#include "mega-xplained_pinmap.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name STDIO configuration
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*
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* As the CPU is too slow to handle 115200 baud, we set the default
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* baudrate to 9600 for this board
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* @{
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*/
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#ifndef UART_STDIO_BAUDRATE
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#define UART_STDIO_BAUDRATE (9600U)
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#endif
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/** @} */
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/**
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* @brief Use the UART 1 for STDIO on this board
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*/
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#define UART_STDIO_DEV (UART_DEV(1))
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/**
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* @brief Context swap defines
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*
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* Setup to use PD7 which is pin change interrupt 31 (PCINT31)
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* This emulates a software triggered interrupt
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*/
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#define AVR_CONTEXT_SWAP_INIT do { \
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DDRD |= (1 << PD7); \
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PCICR |= (1 << PCIE3); \
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PCMSK3 |= (1 << PCINT31); \
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} while (0)
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#define AVR_CONTEXT_SWAP_INTERRUPT_VECT PCINT3_vect
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#define AVR_CONTEXT_SWAP_TRIGGER PORTD ^= (1 << PD7)
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/**
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* @name xtimer configuration values
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*
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* Xtimer runs at 8MHz / 64 = 125kHz
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* @{
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*/
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#define XTIMER_DEV (0)
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#define XTIMER_CHAN (0)
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#define XTIMER_WIDTH (16)
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#define XTIMER_HZ (125000UL)
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#define XTIMER_BACKOFF (40)
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/** @} */
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/**
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* @name LED pin definitions
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* @{
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*/
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/* LED0,2 currently unsupported due to lack of GPIO_OD support */
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#define LED1_PIN GPIO_PIN(PORT_B, 3)
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#define LED1_MODE GPIO_OUT
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#define LED3_PIN GPIO_PIN(PORT_B, 2)
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#define LED3_MODE GPIO_OUT
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/** @} */
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/**
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* @name Macros for controlling the on-board LEDs
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* @{
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*/
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/* LED0,2 currently unsupported due to lack of GPIO_OD support */
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#define LED1_ENABLE_PORT DDRB |= LED1_PIN
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#define LED1_ON PORTB |= LED1_PIN
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#define LED1_OFF PORTB &= ~LED1_PIN
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#define LED1_TOGGLE PORTB ^= LED1_PIN
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#define LED3_ENABLE_PORT DDRB |= LED3_PIN
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#define LED3_ON PORTB |= LED3_PIN
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#define LED3_OFF PORTB &= ~LED3_PIN
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#define LED3_TOGGLE PORTB ^= LED3_PIN
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/** @} */
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/**
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* @name Button pin configuration
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* @{
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*/
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#define BTN0_PIN GPIO_PIN(PORT_B, 0)
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#define BTN0_MODE GPIO_IN
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#define BTN1_PIN GPIO_PIN(PORT_B, 1)
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#define BTN1_MODE GPIO_IN
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/* BTN2 currently unsupported due to lack of GPIO_OD support */
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/**
|
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* @name ADC NTC, light sensor, and filter lines
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* @{
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*/
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#define NTC_OUTPUT GPIO_PIN(PORT_A, 5)
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#define LIGHT_SENSOR_OUTPUT GPIO_PIN(PORT_A, 6)
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#define FILTER_OUTPUT GPIO_PIN(PORT_A, 7)
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/** @} */
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/**
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* @brief Initialize board specific hardware, including clock, LEDs and std-IO
|
||||
*/
|
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void board_init(void);
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||||
#ifdef __cplusplus
|
||||
}
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||||
#endif
|
||||
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||||
#endif /* BOARD_H */
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||||
/** @} */
|
68
boards/mega-xplained/include/gpio_params.h
Normal file
68
boards/mega-xplained/include/gpio_params.h
Normal file
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|
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/*
|
||||
* Copyright (C) 2016 Freie Universität Berlin
|
||||
* 2018 Matthew Blue <matthew.blue.neuro@gmail.com>
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup boards_mega-xplained
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Configuration of SAUL mapped GPIO pins
|
||||
*
|
||||
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
||||
* @author Matthew Blue <matthew.blue.neuro@gmail.com>
|
||||
*/
|
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|
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#ifndef GPIO_PARAMS_H
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#define GPIO_PARAMS_H
|
||||
|
||||
#include "board.h"
|
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#include "saul/periph.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
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/**
|
||||
* @brief GPIO configuration
|
||||
*/
|
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static const saul_gpio_params_t saul_gpio_params[] =
|
||||
{
|
||||
{
|
||||
.name = "Button 0",
|
||||
.pin = BTN0_PIN,
|
||||
.mode = BTN0_MODE,
|
||||
.flags = SAUL_GPIO_INVERTED,
|
||||
},
|
||||
{
|
||||
.name = "Button 1",
|
||||
.pin = BTN1_PIN,
|
||||
.mode = BTN1_MODE,
|
||||
.flags = SAUL_GPIO_INVERTED,
|
||||
},
|
||||
/* BTN2, LED0,2 currently unsupported due to lack of GPIO_OD support */
|
||||
{
|
||||
.name = "LED 1",
|
||||
.pin = LED1_PIN,
|
||||
.mode = LED1_MODE,
|
||||
.flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
|
||||
},
|
||||
{
|
||||
.name = "LED 3",
|
||||
.pin = LED3_PIN,
|
||||
.mode = LED3_MODE,
|
||||
.flags = (SAUL_GPIO_INVERTED | SAUL_GPIO_INIT_CLEAR),
|
||||
}
|
||||
};
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* GPIO_PARAMS_H */
|
||||
/** @} */
|
78
boards/mega-xplained/include/mega-xplained_pinmap.h
Normal file
78
boards/mega-xplained/include/mega-xplained_pinmap.h
Normal file
@ -0,0 +1,78 @@
|
||||
/*
|
||||
* Copyright (C) 2018 Matthew Blue <matthew.blue.neuro@gmail.com>
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup boards_mega-xplained
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Mapping from MCU pins to Mega Xplained pins
|
||||
*
|
||||
* You can use the defines in this file for simplified interaction with the
|
||||
* Mega Xplained specific pin numbers.
|
||||
*
|
||||
* @author Matthew Blue <matthew.blue.neuro@gmail.com>
|
||||
*/
|
||||
|
||||
#ifndef MEGA_XPLAINED_PINMAP_H
|
||||
#define MEGA_XPLAINED_PINMAP_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @name Mapping of MCU pins to Mega Xplained pins
|
||||
* @{
|
||||
*/
|
||||
/*
|
||||
* DESCRIPTION Xplained API PIN PORT PIN
|
||||
*/
|
||||
#define J1_PIN1 GPIO_PIN(PORT_C, 1)
|
||||
#define J1_PIN2 GPIO_PIN(PORT_C, 0)
|
||||
#define J1_PIN3 GPIO_PIN(PORT_D, 0)
|
||||
#define J1_PIN4 GPIO_PIN(PORT_D, 1)
|
||||
#define J1_PIN5 GPIO_PIN(PORT_B, 4)
|
||||
#define J1_PIN6 GPIO_PIN(PORT_B, 5)
|
||||
#define J1_PIN7 GPIO_PIN(PORT_B, 6)
|
||||
#define J1_PIN8 GPIO_PIN(PORT_B, 7)
|
||||
|
||||
#define J2_PIN1 GPIO_PIN(PORT_A, 0)
|
||||
#define J2_PIN2 GPIO_PIN(PORT_A, 1)
|
||||
#define J2_PIN3 GPIO_PIN(PORT_A, 2)
|
||||
#define J2_PIN4 GPIO_PIN(PORT_A, 3)
|
||||
#define J2_PIN5 GPIO_PIN(PORT_A, 4)
|
||||
#define J2_PIN6 GPIO_PIN(PORT_A, 5)
|
||||
#define J2_PIN7 GPIO_PIN(PORT_A, 6)
|
||||
#define J2_PIN8 GPIO_PIN(PORT_A, 7)
|
||||
|
||||
#define J3_PIN1 GPIO_PIN(PORT_B, 0)
|
||||
#define J3_PIN2 GPIO_PIN(PORT_B, 1)
|
||||
#define J3_PIN3 GPIO_PIN(PORT_B, 2)
|
||||
#define J3_PIN4 GPIO_PIN(PORT_B, 3)
|
||||
#define J3_PIN5 GPIO_PIN(PORT_D, 4)
|
||||
#define J3_PIN6 GPIO_PIN(PORT_D, 5)
|
||||
#define J3_PIN7 GPIO_PIN(PORT_C, 4)
|
||||
#define J3_PIN8 GPIO_PIN(PORT_C, 5)
|
||||
|
||||
#define J4_PIN1 GPIO_PIN(PORT_C, 1)
|
||||
#define J4_PIN2 GPIO_PIN(PORT_C, 0)
|
||||
#define J4_PIN3 GPIO_PIN(PORT_D, 2)
|
||||
#define J4_PIN4 GPIO_PIN(PORT_D, 3)
|
||||
#define J4_PIN5 GPIO_PIN(PORT_D, 4)
|
||||
#define J4_PIN6 GPIO_PIN(PORT_B, 5)
|
||||
#define J4_PIN7 GPIO_PIN(PORT_B, 6)
|
||||
#define J4_PIN8 GPIO_PIN(PORT_B, 7)
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* MEGA_XPLAINED_PINMAP_H */
|
||||
/** @} */
|
125
boards/mega-xplained/include/periph_conf.h
Normal file
125
boards/mega-xplained/include/periph_conf.h
Normal file
@ -0,0 +1,125 @@
|
||||
/*
|
||||
* Copyright (C) 2014 Freie Universität Berlin, Hinnerk van Bruinehsen
|
||||
* 2016 Laurent Navet <laurent.navet@gmail.com>
|
||||
* 2017 HAW Hamburg, Dimitri Nahm
|
||||
* 2018 Matthew Blue <matthew.blue.neuro@gmail.com>
|
||||
*
|
||||
* This file is subject to the terms and conditions of the GNU Lesser
|
||||
* General Public License v2.1. See the file LICENSE in the top level
|
||||
* directory for more details.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @ingroup boards_mega-xplained
|
||||
* @{
|
||||
*
|
||||
* @file
|
||||
* @brief Common configuration of MCU periphery for Mega Xplained
|
||||
*
|
||||
* @author Hinnerk van Bruinehsen <h.v.bruinehsen@fu-berlin.de>
|
||||
* @author Laurent Navet <laurent.navet@gmail.com>
|
||||
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
||||
* @author Dimitri Nahm <dimitri.nahm@haw-hamburg.de>
|
||||
* @author Matthew Blue <matthew.blue.neuro@gmail.com>
|
||||
*/
|
||||
|
||||
#ifndef PERIPH_CONF_H
|
||||
#define PERIPH_CONF_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @name Clock configuration
|
||||
*
|
||||
* Frequency of the internal 8MHz RC oscillator.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#define CLOCK_CORECLOCK (8000000UL)
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name Timer configuration
|
||||
*
|
||||
* The ATmega1284P has 4 timers. Timer0 and Timer2 are 8 Bit Timers.
|
||||
*
|
||||
* The timer driver only supports the two 16-bit timers (Timer1 and
|
||||
* Timer3), so those are the only ones we can use here.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#define TIMER_NUMOF (2U)
|
||||
|
||||
#define TIMER_0 MEGA_TIMER1
|
||||
#define TIMER_0_MASK &TIMSK1
|
||||
#define TIMER_0_FLAG &TIFR1
|
||||
#define TIMER_0_ISRA TIMER1_COMPA_vect
|
||||
#define TIMER_0_ISRB TIMER1_COMPB_vect
|
||||
|
||||
#define TIMER_1 MEGA_TIMER3
|
||||
#define TIMER_1_MASK &TIMSK3
|
||||
#define TIMER_1_FLAG &TIFR3
|
||||
#define TIMER_1_ISRA TIMER3_COMPA_vect
|
||||
#define TIMER_1_ISRB TIMER3_COMPB_vect
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name UART configuration
|
||||
*
|
||||
* The UART devices have fixed pin mappings, so all we need to do, is to specify
|
||||
* which devices we would like to use and their corresponding RX interrupts. See
|
||||
* the reference manual for the fixed pin mapping.
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#define UART_NUMOF (2U)
|
||||
|
||||
#define UART_0 MEGA_UART0
|
||||
#define UART_0_ISR USART0_RX_vect
|
||||
|
||||
#define UART_1 MEGA_UART1
|
||||
#define UART_1_ISR USART1_RX_vect
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name SPI configuration
|
||||
*
|
||||
* The ATmega1284P has only one hardware SPI with fixed pin configuration, so
|
||||
* all we can do here, is to enable or disable it...
|
||||
*
|
||||
* The fixed pins used are:
|
||||
* MOSI - PB5 (pin 1)
|
||||
* MISO - PB6 (pin 2)
|
||||
* SCK - PB7 (pin 3)
|
||||
* SS - PB4 (pin 44) -> this pin is configured as output, but not used
|
||||
*
|
||||
* The SS pin must be configured as output for the SPI device to work as
|
||||
* master correctly, though we do not use it for now (as we handle the chip
|
||||
* select externally for now)
|
||||
*
|
||||
* @{
|
||||
*/
|
||||
#define SPI_NUMOF 1 /* set to 0 to disable SPI */
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name I2C configuration
|
||||
* @{
|
||||
*/
|
||||
#define I2C_NUMOF 1
|
||||
/** @} */
|
||||
|
||||
/**
|
||||
* @name ADC configuration
|
||||
* @{
|
||||
*/
|
||||
#define ADC_NUMOF (8U)
|
||||
/** @} */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* PERIPH_CONF_H */
|
Loading…
Reference in New Issue
Block a user