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RIOT/cpu/esp_common
bors[bot] f7ef90d213
Merge #19074
19074: cpu/esp8266: build the SDK bootloader from source r=benpicco a=gschorcht

### Contribution description

This PR is a takeover of PR #17043, which is rebased to the current master and includes some corrections that became necessary after rebasing.

**Copied from description of PR #17043:**

We had four versions of pre-built bootloaders for the esp8266 with different settings of logging and color logging. These bootloaders were manually built from the SDK and shipped with RIOT-OS source code. However there are more settings that affect the bootloader build that are relevant to the app or final board that uses this bootloader. In particular, flash size and flash speed is important for the bootloader to be able to load an app from a large partition table at the fastest speed supported by the board layout and flash chip.

Another example is the UART baudrate of the logging output from the bootloader. The boot ROM will normally start at a baud rate of 74880 (depending on the crystal installed), so it might make sense to keep the UART output at the same speed so we can debug boot modes and bootloader with the same terminal.

This patch builds the `bootloader.bin` file from the ESP8266 SDK source code. The code is built as a module (`esp8266_bootloader`) which at the moment doesn't generate any object code for the application and only produces a `bootloader.bin` file set to the `BOOTLOADER_BIN` make variable for the `esptool.inc.mk` to flash.

The code needs to be compiled and linked with custom rules defined in the module's Makefile since the `bootloader.bin` is its own separate application.

The `BOOTLOADER_BIN` variable is changed from a path relative to the `$(RIOTCPU)/$(CPU)/bin/` directory to be full path. This makes it easier for applications or board to provide their own bootloader binary if needed.

As a result of building the bootloader from source we fixed the issue of having a large partition table.

### Testing procedure

Use following command to flash the application with STDIO UART baudrate of 115200 baud.
```
BAUD=74880 USEMODULE=esp_log_startup make -C tests/shell BOARD=esp8266-esp-12x flash
```
Connect with a terminal programm of your choice (unfortunatly `picocom` and `socat` don't support a baudrate close to 74880), for example:
```
python -m serial.tools.miniterm /dev/ttyUSB0 74880
```
On reset, the `esp8266-esp-12x` node shows the ROM bootloader log output
```
 ets Jan  8 2013,rst cause:2, boot mode:(3,7) 

load 0x40100000, len 6152, room 16 
tail 8
chksum 0x6f
load 0x3ffe8008, len 24, room 0 
tail 8
chksum 0x86
load 0x3ffe8020, len 3408, room 0 
tail 0
chksum 0x79
```
as well as the second-stage bootloader built by this PR (`ESP-IDF v3.1-51-g913a06a9ac3`) at 74880 baudrate.
```
I (42) boot: ESP-IDF v3.1-51-g913a06a9ac3 2nd stage bootloader
I (42) boot: compile time 11:25:03
I (42) boot: SPI Speed      : 26.7MHz
...
I (151) boot: Loaded app from partition at offset 0x10000
```
The application output is seen as garbage since the `esp8266-esp-12x` uses 115200 as baurate by default.

To see all output at a baudrate of 74880 baud, you can use the following command:
```
CFLAGS='-DSTDIO_UART_BAUDRATE=74880' BAUD=74880 USEMODULE=esp_log_startup make -C tests/shell BOARD=esp8266-esp-12x flash
```

If the application is built without options, the ROOM bootloader output will be 74880 baud and the second stage bootloader and application output will be 115200 baud.

### Issues/PRs references

Fixes issue #16402

Co-authored-by: iosabi <iosabi@protonmail.com>
Co-authored-by: Gunar Schorcht <gunar@schorcht.net>
2023-01-03 00:44:24 +00:00
..
esp-now netdev_drivers: make sure to signal LINK_UP at least once 2022-09-16 22:57:28 +02:00
esp-riscv cpu/esp_common: add module esp_riscv to Kconfig 2022-07-18 13:52:13 +02:00
esp-wifi cpu/esp_common: add netdev_register for NETDEV_ESP_WIFI 2022-08-02 09:34:59 +02:00
esp-xtensa cpu/esp_common: fix thread_arch.c for ESP32-S2 2022-08-30 15:08:39 +02:00
freertos cpu/esp_common/freertos: lock/unlock mutex if scheduling is not active 2022-09-02 08:54:31 +02:00
include Merge pull request #18226 from benpicco/cpu_get_last_instruction 2022-09-15 20:06:10 +02:00
periph cpu/esp_common/periph_uart: fix call to _uart_set_mode 2022-10-10 14:27:27 +02:00
vendor cpu/esp_common: MODULE_XTENSA has to depend on HAS_ARCH_ESP_XTENSA 2022-07-18 14:44:02 +02:00
doc.txt cpu/esp_common: added for common files for ESP SoC 2018-12-27 17:28:46 +01:00
esp_common.config sys/random/kconfig: remove HWRNG default in backend choice 2022-04-27 15:41:23 +02:00
esp_events.c cpu/esp_common: changes in event handling for ESP-IDF v4.4 2022-06-01 13:27:31 +02:00
irq_arch.c cpu/esp_common: move irq_arch xtensa code to module esp_xtensa 2022-06-25 23:22:59 +02:00
Kconfig cpu/esp*: cleanup of CPU_ARCH* and CPU_CORE* 2022-08-24 17:15:37 +02:00
lib_printf.c cpu/esp_common: small fix of lib_printf 2022-05-18 07:27:23 +02:00
Makefile cpu/esp_common: add module esp_riscv to makefiles 2022-07-18 13:51:33 +02:00
Makefile.dep cpu: always rely on stdio.inc.mk for default stdio selection 2022-11-09 10:42:47 +01:00
Makefile.features cpu/esp_common: rename architecture to riscv_esp32 to rv32 2022-07-20 17:18:56 +02:00
Makefile.include Merge #19074 2023-01-03 00:44:24 +00:00
syscalls.c cpu/esp_common: improve thread safety for locking functions 2022-09-02 08:54:31 +02:00
thread_arch.c cpu/esp_common: move thread_arch xtensa code to module esp_xtensa 2022-06-25 23:22:59 +02:00
tools.c esp/esp*: move common code to cpu/esp_common 2020-02-21 09:09:34 +01:00