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207 lines
18 KiB
C
207 lines
18 KiB
C
/**************************************************************************//**
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* @file
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* @brief EFR32ZG23 LFRCO register and bit field definitions
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******************************************************************************
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* # License
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* <b>Copyright 2022 Silicon Laboratories, Inc. www.silabs.com</b>
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******************************************************************************
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*
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* SPDX-License-Identifier: Zlib
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*
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* The licensor of this software is Silicon Laboratories Inc.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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*****************************************************************************/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef EFR32ZG23_LFRCO_H
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#define EFR32ZG23_LFRCO_H
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#define LFRCO_HAS_SET_CLEAR
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/**************************************************************************//**
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* @addtogroup Parts
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* @{
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******************************************************************************/
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/**************************************************************************//**
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* @defgroup EFR32ZG23_LFRCO LFRCO
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* @{
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* @brief EFR32ZG23 LFRCO Register Declaration.
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*****************************************************************************/
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/** LFRCO Register Declaration. */
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typedef struct {
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__IM uint32_t IPVERSION; /**< IP version */
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uint32_t RESERVED0[1U]; /**< Reserved for future use */
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__IM uint32_t STATUS; /**< Status Register */
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__IOM uint32_t CAL; /**< Calibration Register */
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uint32_t RESERVED1[1U]; /**< Reserved for future use */
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__IOM uint32_t IF; /**< Interrupt Flag Register */
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__IOM uint32_t IEN; /**< Interrupt Enable Register */
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__IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */
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__IOM uint32_t LOCK; /**< Configuration Lock Register */
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uint32_t RESERVED2[1015U]; /**< Reserved for future use */
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__IM uint32_t IPVERSION_SET; /**< IP version */
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uint32_t RESERVED3[1U]; /**< Reserved for future use */
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__IM uint32_t STATUS_SET; /**< Status Register */
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__IOM uint32_t CAL_SET; /**< Calibration Register */
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uint32_t RESERVED4[1U]; /**< Reserved for future use */
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__IOM uint32_t IF_SET; /**< Interrupt Flag Register */
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__IOM uint32_t IEN_SET; /**< Interrupt Enable Register */
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__IM uint32_t SYNCBUSY_SET; /**< Synchronization Busy Register */
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__IOM uint32_t LOCK_SET; /**< Configuration Lock Register */
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uint32_t RESERVED5[1015U]; /**< Reserved for future use */
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__IM uint32_t IPVERSION_CLR; /**< IP version */
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uint32_t RESERVED6[1U]; /**< Reserved for future use */
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__IM uint32_t STATUS_CLR; /**< Status Register */
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__IOM uint32_t CAL_CLR; /**< Calibration Register */
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uint32_t RESERVED7[1U]; /**< Reserved for future use */
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__IOM uint32_t IF_CLR; /**< Interrupt Flag Register */
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__IOM uint32_t IEN_CLR; /**< Interrupt Enable Register */
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__IM uint32_t SYNCBUSY_CLR; /**< Synchronization Busy Register */
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__IOM uint32_t LOCK_CLR; /**< Configuration Lock Register */
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uint32_t RESERVED8[1015U]; /**< Reserved for future use */
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__IM uint32_t IPVERSION_TGL; /**< IP version */
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uint32_t RESERVED9[1U]; /**< Reserved for future use */
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__IM uint32_t STATUS_TGL; /**< Status Register */
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__IOM uint32_t CAL_TGL; /**< Calibration Register */
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uint32_t RESERVED10[1U]; /**< Reserved for future use */
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__IOM uint32_t IF_TGL; /**< Interrupt Flag Register */
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__IOM uint32_t IEN_TGL; /**< Interrupt Enable Register */
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__IM uint32_t SYNCBUSY_TGL; /**< Synchronization Busy Register */
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__IOM uint32_t LOCK_TGL; /**< Configuration Lock Register */
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} LFRCO_TypeDef;
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/** @} End of group EFR32ZG23_LFRCO */
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/**************************************************************************//**
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* @addtogroup EFR32ZG23_LFRCO
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* @{
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* @defgroup EFR32ZG23_LFRCO_BitFields LFRCO Bit Fields
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* @{
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*****************************************************************************/
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/* Bit fields for LFRCO IPVERSION */
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#define _LFRCO_IPVERSION_RESETVALUE 0x00000000UL /**< Default value for LFRCO_IPVERSION */
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#define _LFRCO_IPVERSION_MASK 0xFFFFFFFFUL /**< Mask for LFRCO_IPVERSION */
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#define _LFRCO_IPVERSION_IPVERSION_SHIFT 0 /**< Shift value for LFRCO_IPVERSION */
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#define _LFRCO_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL /**< Bit mask for LFRCO_IPVERSION */
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#define _LFRCO_IPVERSION_IPVERSION_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_IPVERSION */
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#define LFRCO_IPVERSION_IPVERSION_DEFAULT (_LFRCO_IPVERSION_IPVERSION_DEFAULT << 0) /**< Shifted mode DEFAULT for LFRCO_IPVERSION */
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/* Bit fields for LFRCO STATUS */
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#define _LFRCO_STATUS_RESETVALUE 0x00000000UL /**< Default value for LFRCO_STATUS */
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#define _LFRCO_STATUS_MASK 0x80010001UL /**< Mask for LFRCO_STATUS */
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#define LFRCO_STATUS_RDY (0x1UL << 0) /**< Ready Status */
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#define _LFRCO_STATUS_RDY_SHIFT 0 /**< Shift value for LFRCO_RDY */
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#define _LFRCO_STATUS_RDY_MASK 0x1UL /**< Bit mask for LFRCO_RDY */
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#define _LFRCO_STATUS_RDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_STATUS */
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#define LFRCO_STATUS_RDY_DEFAULT (_LFRCO_STATUS_RDY_DEFAULT << 0) /**< Shifted mode DEFAULT for LFRCO_STATUS */
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#define LFRCO_STATUS_ENS (0x1UL << 16) /**< Enabled Status */
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#define _LFRCO_STATUS_ENS_SHIFT 16 /**< Shift value for LFRCO_ENS */
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#define _LFRCO_STATUS_ENS_MASK 0x10000UL /**< Bit mask for LFRCO_ENS */
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#define _LFRCO_STATUS_ENS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_STATUS */
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#define LFRCO_STATUS_ENS_DEFAULT (_LFRCO_STATUS_ENS_DEFAULT << 16) /**< Shifted mode DEFAULT for LFRCO_STATUS */
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#define LFRCO_STATUS_LOCK (0x1UL << 31) /**< Lock Status */
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#define _LFRCO_STATUS_LOCK_SHIFT 31 /**< Shift value for LFRCO_LOCK */
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#define _LFRCO_STATUS_LOCK_MASK 0x80000000UL /**< Bit mask for LFRCO_LOCK */
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#define _LFRCO_STATUS_LOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_STATUS */
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#define _LFRCO_STATUS_LOCK_UNLOCKED 0x00000000UL /**< Mode UNLOCKED for LFRCO_STATUS */
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#define _LFRCO_STATUS_LOCK_LOCKED 0x00000001UL /**< Mode LOCKED for LFRCO_STATUS */
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#define LFRCO_STATUS_LOCK_DEFAULT (_LFRCO_STATUS_LOCK_DEFAULT << 31) /**< Shifted mode DEFAULT for LFRCO_STATUS */
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#define LFRCO_STATUS_LOCK_UNLOCKED (_LFRCO_STATUS_LOCK_UNLOCKED << 31) /**< Shifted mode UNLOCKED for LFRCO_STATUS */
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#define LFRCO_STATUS_LOCK_LOCKED (_LFRCO_STATUS_LOCK_LOCKED << 31) /**< Shifted mode LOCKED for LFRCO_STATUS */
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/* Bit fields for LFRCO CAL */
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#define _LFRCO_CAL_RESETVALUE 0x000000A5UL /**< Default value for LFRCO_CAL */
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#define _LFRCO_CAL_MASK 0x000000FFUL /**< Mask for LFRCO_CAL */
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#define _LFRCO_CAL_FREQTRIM_SHIFT 0 /**< Shift value for LFRCO_FREQTRIM */
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#define _LFRCO_CAL_FREQTRIM_MASK 0xFFUL /**< Bit mask for LFRCO_FREQTRIM */
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#define _LFRCO_CAL_FREQTRIM_DEFAULT 0x000000A5UL /**< Mode DEFAULT for LFRCO_CAL */
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#define LFRCO_CAL_FREQTRIM_DEFAULT (_LFRCO_CAL_FREQTRIM_DEFAULT << 0) /**< Shifted mode DEFAULT for LFRCO_CAL */
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/* Bit fields for LFRCO IF */
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#define _LFRCO_IF_RESETVALUE 0x00000000UL /**< Default value for LFRCO_IF */
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#define _LFRCO_IF_MASK 0x00000007UL /**< Mask for LFRCO_IF */
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#define LFRCO_IF_RDY (0x1UL << 0) /**< Ready Interrupt Flag */
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#define _LFRCO_IF_RDY_SHIFT 0 /**< Shift value for LFRCO_RDY */
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#define _LFRCO_IF_RDY_MASK 0x1UL /**< Bit mask for LFRCO_RDY */
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#define _LFRCO_IF_RDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_IF */
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#define LFRCO_IF_RDY_DEFAULT (_LFRCO_IF_RDY_DEFAULT << 0) /**< Shifted mode DEFAULT for LFRCO_IF */
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#define LFRCO_IF_POSEDGE (0x1UL << 1) /**< Rising Edge Interrupt Flag */
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#define _LFRCO_IF_POSEDGE_SHIFT 1 /**< Shift value for LFRCO_POSEDGE */
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#define _LFRCO_IF_POSEDGE_MASK 0x2UL /**< Bit mask for LFRCO_POSEDGE */
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#define _LFRCO_IF_POSEDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_IF */
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#define LFRCO_IF_POSEDGE_DEFAULT (_LFRCO_IF_POSEDGE_DEFAULT << 1) /**< Shifted mode DEFAULT for LFRCO_IF */
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#define LFRCO_IF_NEGEDGE (0x1UL << 2) /**< Falling Edge Interrupt Flag */
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#define _LFRCO_IF_NEGEDGE_SHIFT 2 /**< Shift value for LFRCO_NEGEDGE */
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#define _LFRCO_IF_NEGEDGE_MASK 0x4UL /**< Bit mask for LFRCO_NEGEDGE */
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#define _LFRCO_IF_NEGEDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_IF */
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#define LFRCO_IF_NEGEDGE_DEFAULT (_LFRCO_IF_NEGEDGE_DEFAULT << 2) /**< Shifted mode DEFAULT for LFRCO_IF */
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/* Bit fields for LFRCO IEN */
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#define _LFRCO_IEN_RESETVALUE 0x00000000UL /**< Default value for LFRCO_IEN */
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#define _LFRCO_IEN_MASK 0x00000007UL /**< Mask for LFRCO_IEN */
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#define LFRCO_IEN_RDY (0x1UL << 0) /**< Ready Interrupt Enable */
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#define _LFRCO_IEN_RDY_SHIFT 0 /**< Shift value for LFRCO_RDY */
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#define _LFRCO_IEN_RDY_MASK 0x1UL /**< Bit mask for LFRCO_RDY */
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#define _LFRCO_IEN_RDY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_IEN */
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#define LFRCO_IEN_RDY_DEFAULT (_LFRCO_IEN_RDY_DEFAULT << 0) /**< Shifted mode DEFAULT for LFRCO_IEN */
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#define LFRCO_IEN_POSEDGE (0x1UL << 1) /**< Rising Edge Interrupt Enable */
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#define _LFRCO_IEN_POSEDGE_SHIFT 1 /**< Shift value for LFRCO_POSEDGE */
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#define _LFRCO_IEN_POSEDGE_MASK 0x2UL /**< Bit mask for LFRCO_POSEDGE */
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#define _LFRCO_IEN_POSEDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_IEN */
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#define LFRCO_IEN_POSEDGE_DEFAULT (_LFRCO_IEN_POSEDGE_DEFAULT << 1) /**< Shifted mode DEFAULT for LFRCO_IEN */
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#define LFRCO_IEN_NEGEDGE (0x1UL << 2) /**< Falling Edge Interrupt Enable */
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#define _LFRCO_IEN_NEGEDGE_SHIFT 2 /**< Shift value for LFRCO_NEGEDGE */
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#define _LFRCO_IEN_NEGEDGE_MASK 0x4UL /**< Bit mask for LFRCO_NEGEDGE */
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#define _LFRCO_IEN_NEGEDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_IEN */
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#define LFRCO_IEN_NEGEDGE_DEFAULT (_LFRCO_IEN_NEGEDGE_DEFAULT << 2) /**< Shifted mode DEFAULT for LFRCO_IEN */
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/* Bit fields for LFRCO SYNCBUSY */
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#define _LFRCO_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for LFRCO_SYNCBUSY */
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#define _LFRCO_SYNCBUSY_MASK 0x00000001UL /**< Mask for LFRCO_SYNCBUSY */
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#define LFRCO_SYNCBUSY_CAL (0x1UL << 0) /**< CAL Busy */
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#define _LFRCO_SYNCBUSY_CAL_SHIFT 0 /**< Shift value for LFRCO_CAL */
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#define _LFRCO_SYNCBUSY_CAL_MASK 0x1UL /**< Bit mask for LFRCO_CAL */
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#define _LFRCO_SYNCBUSY_CAL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LFRCO_SYNCBUSY */
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#define LFRCO_SYNCBUSY_CAL_DEFAULT (_LFRCO_SYNCBUSY_CAL_DEFAULT << 0) /**< Shifted mode DEFAULT for LFRCO_SYNCBUSY */
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/* Bit fields for LFRCO LOCK */
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#define _LFRCO_LOCK_RESETVALUE 0x00002603UL /**< Default value for LFRCO_LOCK */
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#define _LFRCO_LOCK_MASK 0x0000FFFFUL /**< Mask for LFRCO_LOCK */
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#define _LFRCO_LOCK_LOCKKEY_SHIFT 0 /**< Shift value for LFRCO_LOCKKEY */
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#define _LFRCO_LOCK_LOCKKEY_MASK 0xFFFFUL /**< Bit mask for LFRCO_LOCKKEY */
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#define _LFRCO_LOCK_LOCKKEY_DEFAULT 0x00002603UL /**< Mode DEFAULT for LFRCO_LOCK */
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#define _LFRCO_LOCK_LOCKKEY_LOCK 0x00000000UL /**< Mode LOCK for LFRCO_LOCK */
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#define _LFRCO_LOCK_LOCKKEY_UNLOCK 0x00002603UL /**< Mode UNLOCK for LFRCO_LOCK */
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#define LFRCO_LOCK_LOCKKEY_DEFAULT (_LFRCO_LOCK_LOCKKEY_DEFAULT << 0) /**< Shifted mode DEFAULT for LFRCO_LOCK */
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#define LFRCO_LOCK_LOCKKEY_LOCK (_LFRCO_LOCK_LOCKKEY_LOCK << 0) /**< Shifted mode LOCK for LFRCO_LOCK */
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#define LFRCO_LOCK_LOCKKEY_UNLOCK (_LFRCO_LOCK_LOCKKEY_UNLOCK << 0) /**< Shifted mode UNLOCK for LFRCO_LOCK */
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/** @} End of group EFR32ZG23_LFRCO_BitFields */
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/** @} End of group EFR32ZG23_LFRCO */
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/** @} End of group Parts */
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#endif /* EFR32ZG23_LFRCO_H */
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#ifdef __cplusplus
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}
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#endif
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