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RIOT/cpu/stm32/stmclk
Gilles DOFFE 4bfbb75578 cpu/stm32: add stm32mp1_eng_mode pseudomodule
In Engineering mode (BOOT0 off and BOOT2 on), only the Cortex-M4
core is running. It means that all clocks have to be setup
by the Cortex-M4 core.
In other modes, the clocks are setup by the Cortex-A7 and then should
not be setup by Cortex-M4.
stm32mp1_eng_mode pseudomodule have to be used in Engineering mode
to ensure clocks configuration with IS_USED(MODULE_STM32MP1_ENG_MODE)
macro.
This macro can also be used in periph_conf.h to define clock source
for each peripheral.

Signed-off-by: Gilles DOFFE <gilles.doffe@savoirfairelinux.com>
2020-11-13 10:43:08 +01:00
..
Makefile cpu/stm32: add stm32mp1_eng_mode pseudomodule 2020-11-13 10:43:08 +01:00
stmclk_common.c cpu/stm32: add basic support for stm32l5 2020-10-23 18:21:50 +02:00
stmclk_f0f1f3.c cpu/stm32f0f1f3: configure and initialize MCO 2020-11-05 21:59:00 +01:00
stmclk_f2f4f7.c cpu/stm32: enable power overdrive on f4 and f7 2020-10-14 13:36:20 +02:00
stmclk_gx.c cpu/stm32gx: configure and initialize MCO 2020-11-05 13:39:19 +01:00
stmclk_l0l1.c cpu/stm32l0l1: configure MCO 2020-11-05 13:37:34 +01:00
stmclk_l4wb.c cpu/stm32l4wb: add missing define for PLL HSI source 2020-11-10 09:34:07 +01:00
stmclk_l5.c cpu/stm32: add basic support for stm32l5 2020-10-23 18:21:50 +02:00
stmclk_mp1.c cpu/stm32: add clock configuration for stm32mp1 2020-11-13 10:43:08 +01:00