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28aed3cb97
This splits up the clock configs. It allows CPU_FAM based file sourcing and also common CPU_FAMs. The dependancies are also included in wildcards would be used for the CPU_FAM macro. This should be much more readable. This also takes into account the HSE speeds in order to match the make/header resolution. Some hidden symbols were added to make sorting many CPU_SERIES dependencies easier.
44 lines
2.1 KiB
Plaintext
44 lines
2.1 KiB
Plaintext
# Copyright (c) 2022 HAW Hamburg
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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# General Public License v2.1. See the file LICENSE in the top level
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# directory for more details.
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#
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rsource '../f2f4f7mp1/Kconfig.clk'
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if CPU_FAM_F4
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config CLOCK_PLL_M
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int "M: PLLIN division factor" if CUSTOM_PLL_PARAMS
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default 25 if CLOCK_MAX_84MHZ && CLOCK_HSE = 25000000
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default 25 if CLOCK_MAX_100MHZ && CLOCK_HSE = 25000000
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default 12 if CLOCK_MAX_180MHZ && CLOCK_HSE = 16000000
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default 12 if CLOCK_MAX_180MHZ && CLOCK_HSE = 12000000
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default 4
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config CLOCK_PLL_N
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int "N: PLLIN multiply factor" if CUSTOM_PLL_PARAMS
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default 168 if CLOCK_MAX_84MHZ && CLOCK_HSE = 8000000
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default 336 if CLOCK_MAX_84MHZ && CLOCK_HSE = 25000000
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default 84 if CLOCK_MAX_84MHZ
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default 96 if CLOCK_MAX_100MHZ && CLOCK_HSE = 8000000 && (MODULE_PERIPH_USBDEV_CLK || USEMODULE_PERIPH_USBDEV_CLK) && !HAVE_CLOCK_ALT_48MHZ
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default 100 if CLOCK_MAX_100MHZ && CLOCK_HSE = 8000000
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default 192 if CLOCK_MAX_100MHZ && CLOCK_HSE = 25000000 && (MODULE_PERIPH_USBDEV_CLK || USEMODULE_PERIPH_USBDEV_CLK) && !HAVE_CLOCK_ALT_48MHZ
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default 200 if CLOCK_MAX_100MHZ && CLOCK_HSE = 25000000
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default 48 if CLOCK_MAX_100MHZ && (MODULE_PERIPH_USBDEV_CLK || USEMODULE_PERIPH_USBDEV_CLK)
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default 50 if CLOCK_MAX_100MHZ
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default 168 if CLOCK_MAX_180MHZ && CLOCK_HSE = 8000000 && (MODULE_PERIPH_USBDEV_CLK || USEMODULE_PERIPH_USBDEV_CLK) && !HAVE_CLOCK_ALT_48MHZ
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default 180 if CLOCK_MAX_180MHZ && CLOCK_HSE = 8000000
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default 336 if CLOCK_MAX_180MHZ && CLOCK_HSE = 12000000 && (MODULE_PERIPH_USBDEV_CLK || USEMODULE_PERIPH_USBDEV_CLK) && !HAVE_CLOCK_ALT_48MHZ
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default 360 if CLOCK_MAX_180MHZ && CLOCK_HSE = 12000000
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default 336 if CLOCK_MAX_180MHZ && CLOCK_HSE = 16000000 && (MODULE_PERIPH_USBDEV_CLK || USEMODULE_PERIPH_USBDEV_CLK) && !HAVE_CLOCK_ALT_48MHZ
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default 360 if CLOCK_MAX_180MHZ && CLOCK_HSE = 16000000
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default 84 if CLOCK_MAX_180MHZ && (MODULE_PERIPH_USBDEV_CLK || USEMODULE_PERIPH_USBDEV_CLK) && !HAVE_CLOCK_ALT_48MHZ
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default 90 if CLOCK_MAX_180MHZ
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range 50 432
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endif # CPU_FAM_F4
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