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https://github.com/RIOT-OS/RIOT.git
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978ea409b5
This adds almost all registers necessary to flash create the CCFG configuration. Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
169 lines
7.1 KiB
C
169 lines
7.1 KiB
C
/*
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* Copyright (C) 2016 Leon George
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_cc26xx_cc13xx_definitions
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* @{
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*
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* @file
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* @brief CC26xx/CC13xx CCFG register definitions
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*/
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#ifndef CC26XX_CC13XX_CCFG_H
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#define CC26XX_CC13XX_CCFG_H
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#include <cc26xx_cc13xx.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief CCFG registers
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*/
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typedef struct {
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reg32_t EXT_LF_CLK; /**< extern LF clock config */
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reg32_t MODE_CONF_1; /**< mode config 1 */
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reg32_t SIZE_AND_DIS_FLAGS; /**< CCFG size and disable flags */
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reg32_t MODE_CONF; /**< mmode config 0 */
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reg32_t VOLT_LOAD_0; /**< voltage load 0 */
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reg32_t VOLT_LOAD_1; /**< voltage load 1 */
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reg32_t RTC_OFFSET; /**< RTC offset */
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reg32_t FREQ_OFFSET; /**< frequency offset */
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reg32_t IEEE_MAC_0; /**< IEEE MAC address 0 */
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reg32_t IEEE_MAC_1; /**< IEEE MAC address 1 */
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reg32_t IEEE_BLE_0; /**< IEEE BLE address 0 */
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reg32_t IEEE_BLE_1; /**< IEEE BLE address 1 */
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reg32_t BL_CONFIG; /**< bootloader config */
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reg32_t ERASE_CONF; /**< erase config */
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reg32_t CCFG_TI_OPTIONS; /**< TI options */
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reg32_t CCFG_TAP_DAP_0; /**< test access points enable 0 */
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reg32_t CCFG_TAP_DAP_1; /**< test access points enable 1 */
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reg32_t IMAGE_VALID_CONF; /**< image valid */
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reg32_t CCFG_PROT_31_0; /**< protect sectors 0-31 */
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reg32_t CCFG_PROT_63_32; /**< protect sectors 32-63 */
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reg32_t CCFG_PROT_95_64; /**< protect sectors 64-95 */
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reg32_t CCFG_PROT_127_96; /**< protect sectors 96-127 */
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} ccfg_regs_t;
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/**
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* @brief CCFG register values
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* @{
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*/
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#define CCFG_EXT_LF_CLK_DIO_m 0xFF000000
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#define CCFG_EXT_LF_CLK_DIO_s 24
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#define CCFG_EXT_LF_CLK_RTC_INCREMENT_m 0x00FFFFFF
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#define CCFG_EXT_LF_CLK_RTC_INCREMENT_s 0
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#define CCFG_MODE_CONF_1_TCXO_TYPE_m 0x80000000
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#define CCFG_MODE_CONF_1_TCXO_TYPE_s 31
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#define CCFG_MODE_CONF_1_TCXO_MAX_START_m 0x7F000000
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#define CCFG_MODE_CONF_1_TCXO_MAX_START_s 24
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#define CCFG_MODE_CONF_1_ALT_DCDC_VMIN_m 0x00F00000
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#define CCFG_MODE_CONF_1_ALT_DCDC_VMIN_s 20
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#define CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_m 0x00080000
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#define CCFG_MODE_CONF_1_ALT_DCDC_DITHER_EN_s 19
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#define CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_m 0x00070000
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#define CCFG_MODE_CONF_1_ALT_DCDC_IPEAK_s 16
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#define CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_m 0x0000F000
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#define CCFG_MODE_CONF_1_DELTA_IBIAS_INIT_s 12
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#define CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_m 0x00000F00
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#define CCFG_MODE_CONF_1_DELTA_IBIAS_OFFSET_s 8
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#define CCFG_MODE_CONF_1_XOSC_MAX_START_m 0x000000FF
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#define CCFG_MODE_CONF_1_XOSC_MAX_START_s 0
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#define CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_m 0xFFFF0000
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#define CCFG_SIZE_AND_DIS_FLAGS_SIZE_OF_CCFG_s 16
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#define CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_m 0x0000FFF0
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#define CCFG_SIZE_AND_DIS_FLAGS_DISABLE_FLAGS_s 4
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#define CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_m 0x00000008
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#define CCFG_SIZE_AND_DIS_FLAGS_DIS_TCXO_s 3
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#define CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_m 0x00000004
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#define CCFG_SIZE_AND_DIS_FLAGS_DIS_GPRAM_s 2
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#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING 0x00000002
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#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_m 0x00000002
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#define CCFG_SIZE_AND_DIS_FLAGS_DIS_ALT_DCDC_SETTING_s 1
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#define CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_m 0x00000001
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#define CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_s 0
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#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_m 0xF0000000
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#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_DELTA_s 28
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#define CCFG_MODE_CONF_DCDC_RECHARGE_m 0x08000000
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#define CCFG_MODE_CONF_DCDC_RECHARGE_s 27
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#define CCFG_MODE_CONF_DCDC_ACTIVE_m 0x04000000
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#define CCFG_MODE_CONF_DCDC_ACTIVE_s 26
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#define CCFG_MODE_CONF_VDDR_EXT_LOAD 0x02000000
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#define CCFG_MODE_CONF_VDDR_EXT_LOAD_m 0x02000000
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#define CCFG_MODE_CONF_VDDR_EXT_LOAD_s 25
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#define CCFG_MODE_CONF_VDDS_BOD_LEVEL 0x01000000
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#define CCFG_MODE_CONF_VDDS_BOD_LEVEL_m 0x01000000
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#define CCFG_MODE_CONF_VDDS_BOD_LEVEL_s 24
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#define CCFG_MODE_CONF_SCLK_LF_OPTION_m 0x00C00000
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#define CCFG_MODE_CONF_SCLK_LF_OPTION_s 22
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#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_m 0x00200000
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#define CCFG_MODE_CONF_VDDR_TRIM_SLEEP_TC_s 21
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#define CCFG_MODE_CONF_RTC_COMP_m 0x00100000
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#define CCFG_MODE_CONF_RTC_COMP_s 20
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#define CCFG_MODE_CONF_XOSC_FREQ_m 0x000C0000
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#define CCFG_MODE_CONF_XOSC_FREQ_s 18
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#define CCFG_MODE_CONF_XOSC_CAP_MOD_m 0x00020000
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#define CCFG_MODE_CONF_XOSC_CAP_MOD_s 17
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#define CCFG_MODE_CONF_HF_COMP_m 0x00010000
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#define CCFG_MODE_CONF_HF_COMP_s 16
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#define CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_m 0x0000FF00
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#define CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_s 8
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#define CCFG_MODE_CONF_VDDR_CAP_m 0x000000FF
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#define CCFG_MODE_CONF_VDDR_CAP_s 0
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#define CCFG_BL_CONFIG_BOOTLOADER_ENABLE_m 0xFF000000
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#define CCFG_BL_CONFIG_BOOTLOADER_ENABLE_s 24
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#define CCFG_BL_CONFIG_BL_LEVEL_m 0x00010000
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#define CCFG_BL_CONFIG_BL_LEVEL_s 16
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#define CCFG_BL_CONFIG_BL_PIN_NUMBER_m 0x0000FF00
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#define CCFG_BL_CONFIG_BL_PIN_NUMBER_s 8
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#define CCFG_BL_CONFIG_BL_ENABLE_m 0x000000FF
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#define CCFG_BL_CONFIG_BL_ENABLE_s 0
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#define CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_m 0x00000100
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#define CCFG_ERASE_CONF_CHIP_ERASE_DIS_N_s 8
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#define CCFG_ERASE_CONF_BANK_ERASE_DIS_N_m 0x00000001
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#define CCFG_ERASE_CONF_BANK_ERASE_DIS_N_s 0
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#define CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_m 0x000000FF
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#define CCFG_CCFG_TI_OPTIONS_TI_FA_ENABLE_s 0
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#define CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_m 0x00FF0000
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#define CCFG_CCFG_TAP_DAP_0_CPU_DAP_ENABLE_s 16
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#define CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_m 0x0000FF00
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#define CCFG_CCFG_TAP_DAP_0_PWRPROF_TAP_ENABLE_s 8
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#define CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_m 0x000000FF
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#define CCFG_CCFG_TAP_DAP_0_TEST_TAP_ENABLE_s 0
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/** @} */
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/**
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* @ingroup cpu_specific_peripheral_memory_map
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* @{
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*/
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/**
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* @brief CCFG base address
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*/
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#define CCFG_BASE (0x50003000)
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/** @} */
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#ifdef CPU_VARIANT_X0
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/**
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* @brief CCFG register bank
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*/
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#define CCFG ((ccfg_regs_t *) (CCFG_BASE + 0xFA8))
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#else
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/**
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* @brief CCFG register bank
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*/
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#define CCFG ((ccfg_regs_t *) (CCFG_BASE + 0x1FA8))
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#endif
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#ifdef __cplusplus
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} /* end extern "C" */
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#endif
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#endif /* CC26XX_CC13XX_CCFG_H */
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/** @} */
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