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https://github.com/RIOT-OS/RIOT.git
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154 lines
4.5 KiB
C
154 lines
4.5 KiB
C
/*
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* Copyright (C) 2015 TriaGnoSys GmbH
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* 2017 Alexander Kurth, Sören Tempel, Tristan Bruns
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* 2020 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_common_stm32
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* @{
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*
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* @file
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* @brief Default clock configuration for STM32F1/F3
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*
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* @author Víctor Ariño <victor.arino@triagnosys.com>
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* @author Sören Tempel <tempel@uni-bremen.de>
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* @author Tristan Bruns <tbruns@uni-bremen.de>
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* @author Alexander Kurth <kurth1@uni-bremen.de>
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*
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*/
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#ifndef F1F3_CFG_CLOCK_DEFAULT_H
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#define F1F3_CFG_CLOCK_DEFAULT_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock settings
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* @{
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*/
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/* Select the desired system clock source between PLL, HSE or HSI */
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#ifndef CONFIG_USE_CLOCK_PLL
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HSE) || IS_ACTIVE(CONFIG_USE_CLOCK_HSI)
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#define CONFIG_USE_CLOCK_PLL 0
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#else
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#define CONFIG_USE_CLOCK_PLL 1 /* Use PLL by default */
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#endif
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#endif /* CONFIG_USE_CLOCK_PLL */
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#ifndef CONFIG_USE_CLOCK_HSE
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#define CONFIG_USE_CLOCK_HSE 0
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#endif /* CONFIG_USE_CLOCK_HSE */
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#ifndef CONFIG_USE_CLOCK_HSI
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#define CONFIG_USE_CLOCK_HSI 0
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#endif /* CONFIG_USE_CLOCK_HSI */
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#if IS_ACTIVE(CONFIG_USE_CLOCK_PLL) && \
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(IS_ACTIVE(CONFIG_USE_CLOCK_HSE) || IS_ACTIVE(CONFIG_USE_CLOCK_HSI))
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#error "Cannot use PLL as clock source with other clock configurations"
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#endif
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HSE) && \
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(IS_ACTIVE(CONFIG_USE_CLOCK_PLL) || IS_ACTIVE(CONFIG_USE_CLOCK_HSI))
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#error "Cannot use HSE as clock source with other clock configurations"
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#endif
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HSI) && \
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(IS_ACTIVE(CONFIG_USE_CLOCK_PLL) || IS_ACTIVE(CONFIG_USE_CLOCK_HSE))
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#error "Cannot use HSI as clock source with other clock configurations"
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#endif
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#ifndef CONFIG_BOARD_HAS_HSE
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#define CONFIG_BOARD_HAS_HSE 0
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#endif
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#ifndef CLOCK_HSE
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#define CLOCK_HSE MHZ(8)
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#endif
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#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE < MHZ(4) || CLOCK_HSE > MHZ(32))
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#error "HSE clock frequency must be between 4MHz and 32MHz"
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#endif
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#ifndef CONFIG_BOARD_HAS_LSE
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#define CONFIG_BOARD_HAS_LSE 0
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#endif
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#if IS_ACTIVE(CONFIG_BOARD_HAS_LSE)
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#define CLOCK_LSE (1)
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#else
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#define CLOCK_LSE (0)
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#endif
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#define CLOCK_HSI MHZ(8)
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/* The following parameters configure a 72MHz system clock with HSE (8MHz or
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16MHz) and HSI (8MHz) as input clock */
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#ifndef CONFIG_CLOCK_PLL_PREDIV
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#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE) && (CLOCK_HSE == MHZ(16))
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#define CONFIG_CLOCK_PLL_PREDIV (2)
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#else
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#define CONFIG_CLOCK_PLL_PREDIV (1)
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#endif
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#endif
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#ifndef CONFIG_CLOCK_PLL_MUL
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#define CONFIG_CLOCK_PLL_MUL (9)
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#endif
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#if IS_ACTIVE(CONFIG_USE_CLOCK_HSI)
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#define CLOCK_CORECLOCK (CLOCK_HSI)
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#elif IS_ACTIVE(CONFIG_USE_CLOCK_HSE)
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#if !IS_ACTIVE(CONFIG_BOARD_HAS_HSE)
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#error "The board doesn't provide an HSE oscillator"
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#endif
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#define CLOCK_CORECLOCK (CLOCK_HSE)
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#elif IS_ACTIVE(CONFIG_USE_CLOCK_PLL)
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#if IS_ACTIVE(CONFIG_BOARD_HAS_HSE)
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#define CLOCK_PLL_SRC (CLOCK_HSE)
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#else /* CLOCK_HSI */
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#define CLOCK_PLL_SRC (CLOCK_HSI)
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#endif
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/* PLL configuration: make sure your values are legit!
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*
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* compute by: CORECLOCK = ((PLL_IN / PLL_PREDIV) * PLL_MUL)
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* with:
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* PLL_IN: input clock is HSE if available or HSI otherwise
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* PLL_PREDIV : pre-divider, allowed range: [1:16]
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* PLL_MUL: multiplier, allowed range: [2:16]
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* CORECLOCK -> 72MHz MAX!
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*/
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#define CLOCK_CORECLOCK ((CLOCK_PLL_SRC / CONFIG_CLOCK_PLL_PREDIV) * CONFIG_CLOCK_PLL_MUL)
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#if CLOCK_CORECLOCK > MHZ(72)
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#error "SYSCLK cannot exceed 72MHz"
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#endif
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#endif /* CONFIG_USE_CLOCK_PLL */
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#define CLOCK_AHB CLOCK_CORECLOCK /* HCLK, max: 72MHz */
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#ifndef CONFIG_CLOCK_APB1_DIV
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#define CONFIG_CLOCK_APB1_DIV (2)
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#endif
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#define CLOCK_APB1 (CLOCK_AHB / CONFIG_CLOCK_APB1_DIV) /* PCLK1, max: 36MHz */
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#ifndef CONFIG_CLOCK_APB2_DIV
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#define CONFIG_CLOCK_APB2_DIV (1)
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#endif
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#define CLOCK_APB2 (CLOCK_AHB / CONFIG_CLOCK_APB2_DIV) /* PCLK2, max: 72MHz */
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* F1F3_CFG_CLOCK_DEFAULT_H */
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/** @} */
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