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642 lines
72 KiB
C
642 lines
72 KiB
C
/**************************************************************************//**
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* @file
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* @brief EFR32ZG23 LCD register and bit field definitions
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******************************************************************************
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* # License
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* <b>Copyright 2022 Silicon Laboratories, Inc. www.silabs.com</b>
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******************************************************************************
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*
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* SPDX-License-Identifier: Zlib
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*
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* The licensor of this software is Silicon Laboratories Inc.
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*
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* This software is provided 'as-is', without any express or implied
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* warranty. In no event will the authors be held liable for any damages
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* arising from the use of this software.
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software. If you use this software
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* in a product, an acknowledgment in the product documentation would be
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* appreciated but is not required.
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.
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* 3. This notice may not be removed or altered from any source distribution.
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*
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*****************************************************************************/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef EFR32ZG23_LCD_H
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#define EFR32ZG23_LCD_H
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#define LCD_HAS_SET_CLEAR
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/**************************************************************************//**
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* @addtogroup Parts
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* @{
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******************************************************************************/
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/**************************************************************************//**
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* @defgroup EFR32ZG23_LCD LCD
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* @{
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* @brief EFR32ZG23 LCD Register Declaration.
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*****************************************************************************/
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/** LCD Register Declaration. */
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typedef struct {
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__IM uint32_t IPVERSION; /**< IPVERSION */
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__IOM uint32_t EN; /**< Enable */
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__IOM uint32_t SWRST; /**< Software Reset */
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__IOM uint32_t CTRL; /**< Control Register */
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__IOM uint32_t CMD; /**< Command register */
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__IOM uint32_t DISPCTRL; /**< Display Control Register */
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__IOM uint32_t BACFG; /**< Blink and Animation Config Register */
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__IOM uint32_t BACTRL; /**< Blink and Animation Control Register */
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__IM uint32_t STATUS; /**< Status Register */
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__IOM uint32_t AREGA; /**< Animation Register A */
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__IOM uint32_t AREGB; /**< Animation Register B */
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__IOM uint32_t IF; /**< Interrupt Enable Register */
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__IOM uint32_t IEN; /**< Interrupt Enable */
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__IOM uint32_t BIASCTRL; /**< Analog BIAS Control */
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__IOM uint32_t DISPCTRLX; /**< Display Control Extended */
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uint32_t RESERVED0[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD0; /**< Segment Data Register 0 */
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uint32_t RESERVED1[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD1; /**< Segment Data Register 1 */
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uint32_t RESERVED2[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD2; /**< Segment Data Register 2 */
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uint32_t RESERVED3[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD3; /**< Segment Data Register 3 */
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uint32_t RESERVED4[25U]; /**< Reserved for future use */
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__IOM uint32_t UPDATECTRL; /**< Update Control */
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uint32_t RESERVED5[11U]; /**< Reserved for future use */
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__IOM uint32_t FRAMERATE; /**< Frame Rate */
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uint32_t RESERVED6[963U]; /**< Reserved for future use */
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__IM uint32_t IPVERSION_SET; /**< IPVERSION */
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__IOM uint32_t EN_SET; /**< Enable */
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__IOM uint32_t SWRST_SET; /**< Software Reset */
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__IOM uint32_t CTRL_SET; /**< Control Register */
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__IOM uint32_t CMD_SET; /**< Command register */
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__IOM uint32_t DISPCTRL_SET; /**< Display Control Register */
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__IOM uint32_t BACFG_SET; /**< Blink and Animation Config Register */
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__IOM uint32_t BACTRL_SET; /**< Blink and Animation Control Register */
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__IM uint32_t STATUS_SET; /**< Status Register */
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__IOM uint32_t AREGA_SET; /**< Animation Register A */
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__IOM uint32_t AREGB_SET; /**< Animation Register B */
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__IOM uint32_t IF_SET; /**< Interrupt Enable Register */
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__IOM uint32_t IEN_SET; /**< Interrupt Enable */
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__IOM uint32_t BIASCTRL_SET; /**< Analog BIAS Control */
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__IOM uint32_t DISPCTRLX_SET; /**< Display Control Extended */
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uint32_t RESERVED7[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD0_SET; /**< Segment Data Register 0 */
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uint32_t RESERVED8[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD1_SET; /**< Segment Data Register 1 */
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uint32_t RESERVED9[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD2_SET; /**< Segment Data Register 2 */
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uint32_t RESERVED10[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD3_SET; /**< Segment Data Register 3 */
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uint32_t RESERVED11[25U]; /**< Reserved for future use */
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__IOM uint32_t UPDATECTRL_SET; /**< Update Control */
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uint32_t RESERVED12[11U]; /**< Reserved for future use */
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__IOM uint32_t FRAMERATE_SET; /**< Frame Rate */
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uint32_t RESERVED13[963U]; /**< Reserved for future use */
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__IM uint32_t IPVERSION_CLR; /**< IPVERSION */
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__IOM uint32_t EN_CLR; /**< Enable */
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__IOM uint32_t SWRST_CLR; /**< Software Reset */
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__IOM uint32_t CTRL_CLR; /**< Control Register */
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__IOM uint32_t CMD_CLR; /**< Command register */
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__IOM uint32_t DISPCTRL_CLR; /**< Display Control Register */
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__IOM uint32_t BACFG_CLR; /**< Blink and Animation Config Register */
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__IOM uint32_t BACTRL_CLR; /**< Blink and Animation Control Register */
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__IM uint32_t STATUS_CLR; /**< Status Register */
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__IOM uint32_t AREGA_CLR; /**< Animation Register A */
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__IOM uint32_t AREGB_CLR; /**< Animation Register B */
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__IOM uint32_t IF_CLR; /**< Interrupt Enable Register */
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__IOM uint32_t IEN_CLR; /**< Interrupt Enable */
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__IOM uint32_t BIASCTRL_CLR; /**< Analog BIAS Control */
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__IOM uint32_t DISPCTRLX_CLR; /**< Display Control Extended */
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uint32_t RESERVED14[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD0_CLR; /**< Segment Data Register 0 */
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uint32_t RESERVED15[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD1_CLR; /**< Segment Data Register 1 */
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uint32_t RESERVED16[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD2_CLR; /**< Segment Data Register 2 */
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uint32_t RESERVED17[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD3_CLR; /**< Segment Data Register 3 */
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uint32_t RESERVED18[25U]; /**< Reserved for future use */
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__IOM uint32_t UPDATECTRL_CLR; /**< Update Control */
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uint32_t RESERVED19[11U]; /**< Reserved for future use */
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__IOM uint32_t FRAMERATE_CLR; /**< Frame Rate */
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uint32_t RESERVED20[963U]; /**< Reserved for future use */
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__IM uint32_t IPVERSION_TGL; /**< IPVERSION */
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__IOM uint32_t EN_TGL; /**< Enable */
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__IOM uint32_t SWRST_TGL; /**< Software Reset */
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__IOM uint32_t CTRL_TGL; /**< Control Register */
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__IOM uint32_t CMD_TGL; /**< Command register */
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__IOM uint32_t DISPCTRL_TGL; /**< Display Control Register */
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__IOM uint32_t BACFG_TGL; /**< Blink and Animation Config Register */
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__IOM uint32_t BACTRL_TGL; /**< Blink and Animation Control Register */
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__IM uint32_t STATUS_TGL; /**< Status Register */
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__IOM uint32_t AREGA_TGL; /**< Animation Register A */
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__IOM uint32_t AREGB_TGL; /**< Animation Register B */
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__IOM uint32_t IF_TGL; /**< Interrupt Enable Register */
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__IOM uint32_t IEN_TGL; /**< Interrupt Enable */
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__IOM uint32_t BIASCTRL_TGL; /**< Analog BIAS Control */
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__IOM uint32_t DISPCTRLX_TGL; /**< Display Control Extended */
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uint32_t RESERVED21[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD0_TGL; /**< Segment Data Register 0 */
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uint32_t RESERVED22[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD1_TGL; /**< Segment Data Register 1 */
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uint32_t RESERVED23[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD2_TGL; /**< Segment Data Register 2 */
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uint32_t RESERVED24[1U]; /**< Reserved for future use */
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__IOM uint32_t SEGD3_TGL; /**< Segment Data Register 3 */
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uint32_t RESERVED25[25U]; /**< Reserved for future use */
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__IOM uint32_t UPDATECTRL_TGL; /**< Update Control */
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uint32_t RESERVED26[11U]; /**< Reserved for future use */
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__IOM uint32_t FRAMERATE_TGL; /**< Frame Rate */
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} LCD_TypeDef;
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/** @} End of group EFR32ZG23_LCD */
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/**************************************************************************//**
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* @addtogroup EFR32ZG23_LCD
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* @{
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* @defgroup EFR32ZG23_LCD_BitFields LCD Bit Fields
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* @{
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*****************************************************************************/
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/* Bit fields for LCD IPVERSION */
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#define _LCD_IPVERSION_RESETVALUE 0x00000001UL /**< Default value for LCD_IPVERSION */
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#define _LCD_IPVERSION_MASK 0xFFFFFFFFUL /**< Mask for LCD_IPVERSION */
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#define _LCD_IPVERSION_IPVERSION_SHIFT 0 /**< Shift value for LCD_IPVERSION */
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#define _LCD_IPVERSION_IPVERSION_MASK 0xFFFFFFFFUL /**< Bit mask for LCD_IPVERSION */
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#define _LCD_IPVERSION_IPVERSION_DEFAULT 0x00000001UL /**< Mode DEFAULT for LCD_IPVERSION */
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#define LCD_IPVERSION_IPVERSION_DEFAULT (_LCD_IPVERSION_IPVERSION_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_IPVERSION */
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/* Bit fields for LCD EN */
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#define _LCD_EN_RESETVALUE 0x00000000UL /**< Default value for LCD_EN */
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#define _LCD_EN_MASK 0x00000003UL /**< Mask for LCD_EN */
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#define LCD_EN_EN (0x1UL << 0) /**< Enable */
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#define _LCD_EN_EN_SHIFT 0 /**< Shift value for LCD_EN */
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#define _LCD_EN_EN_MASK 0x1UL /**< Bit mask for LCD_EN */
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#define _LCD_EN_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_EN */
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#define _LCD_EN_EN_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_EN */
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#define _LCD_EN_EN_ENABLE 0x00000001UL /**< Mode ENABLE for LCD_EN */
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#define LCD_EN_EN_DEFAULT (_LCD_EN_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_EN */
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#define LCD_EN_EN_DISABLE (_LCD_EN_EN_DISABLE << 0) /**< Shifted mode DISABLE for LCD_EN */
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#define LCD_EN_EN_ENABLE (_LCD_EN_EN_ENABLE << 0) /**< Shifted mode ENABLE for LCD_EN */
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#define LCD_EN_DISABLING (0x1UL << 1) /**< Disablement busy status */
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#define _LCD_EN_DISABLING_SHIFT 1 /**< Shift value for LCD_DISABLING */
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#define _LCD_EN_DISABLING_MASK 0x2UL /**< Bit mask for LCD_DISABLING */
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#define _LCD_EN_DISABLING_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_EN */
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#define LCD_EN_DISABLING_DEFAULT (_LCD_EN_DISABLING_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_EN */
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/* Bit fields for LCD SWRST */
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#define _LCD_SWRST_RESETVALUE 0x00000000UL /**< Default value for LCD_SWRST */
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#define _LCD_SWRST_MASK 0x00000003UL /**< Mask for LCD_SWRST */
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#define LCD_SWRST_SWRST (0x1UL << 0) /**< Software reset command */
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#define _LCD_SWRST_SWRST_SHIFT 0 /**< Shift value for LCD_SWRST */
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#define _LCD_SWRST_SWRST_MASK 0x1UL /**< Bit mask for LCD_SWRST */
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#define _LCD_SWRST_SWRST_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SWRST */
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#define LCD_SWRST_SWRST_DEFAULT (_LCD_SWRST_SWRST_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SWRST */
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#define LCD_SWRST_RESETTING (0x1UL << 1) /**< Software reset busy status */
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#define _LCD_SWRST_RESETTING_SHIFT 1 /**< Shift value for LCD_RESETTING */
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#define _LCD_SWRST_RESETTING_MASK 0x2UL /**< Bit mask for LCD_RESETTING */
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#define _LCD_SWRST_RESETTING_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SWRST */
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#define LCD_SWRST_RESETTING_DEFAULT (_LCD_SWRST_RESETTING_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_SWRST */
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/* Bit fields for LCD CTRL */
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#define _LCD_CTRL_RESETVALUE 0x00100000UL /**< Default value for LCD_CTRL */
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#define _LCD_CTRL_MASK 0x7F1D0006UL /**< Mask for LCD_CTRL */
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#define _LCD_CTRL_UDCTRL_SHIFT 1 /**< Shift value for LCD_UDCTRL */
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#define _LCD_CTRL_UDCTRL_MASK 0x6UL /**< Bit mask for LCD_UDCTRL */
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#define _LCD_CTRL_UDCTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CTRL */
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#define _LCD_CTRL_UDCTRL_REGULAR 0x00000000UL /**< Mode REGULAR for LCD_CTRL */
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#define _LCD_CTRL_UDCTRL_FRAMESTART 0x00000001UL /**< Mode FRAMESTART for LCD_CTRL */
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#define _LCD_CTRL_UDCTRL_FCEVENT 0x00000002UL /**< Mode FCEVENT for LCD_CTRL */
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#define _LCD_CTRL_UDCTRL_DISPLAYEVENT 0x00000003UL /**< Mode DISPLAYEVENT for LCD_CTRL */
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#define LCD_CTRL_UDCTRL_DEFAULT (_LCD_CTRL_UDCTRL_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_CTRL */
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#define LCD_CTRL_UDCTRL_REGULAR (_LCD_CTRL_UDCTRL_REGULAR << 1) /**< Shifted mode REGULAR for LCD_CTRL */
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#define LCD_CTRL_UDCTRL_FRAMESTART (_LCD_CTRL_UDCTRL_FRAMESTART << 1) /**< Shifted mode FRAMESTART for LCD_CTRL */
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#define LCD_CTRL_UDCTRL_FCEVENT (_LCD_CTRL_UDCTRL_FCEVENT << 1) /**< Shifted mode FCEVENT for LCD_CTRL */
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#define LCD_CTRL_UDCTRL_DISPLAYEVENT (_LCD_CTRL_UDCTRL_DISPLAYEVENT << 1) /**< Shifted mode DISPLAYEVENT for LCD_CTRL */
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#define LCD_CTRL_DSC (0x1UL << 16) /**< Direct Segment Control */
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#define _LCD_CTRL_DSC_SHIFT 16 /**< Shift value for LCD_DSC */
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#define _LCD_CTRL_DSC_MASK 0x10000UL /**< Bit mask for LCD_DSC */
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#define _LCD_CTRL_DSC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CTRL */
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#define _LCD_CTRL_DSC_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_CTRL */
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#define _LCD_CTRL_DSC_ENABLE 0x00000001UL /**< Mode ENABLE for LCD_CTRL */
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#define LCD_CTRL_DSC_DEFAULT (_LCD_CTRL_DSC_DEFAULT << 16) /**< Shifted mode DEFAULT for LCD_CTRL */
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#define LCD_CTRL_DSC_DISABLE (_LCD_CTRL_DSC_DISABLE << 16) /**< Shifted mode DISABLE for LCD_CTRL */
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#define LCD_CTRL_DSC_ENABLE (_LCD_CTRL_DSC_ENABLE << 16) /**< Shifted mode ENABLE for LCD_CTRL */
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#define _LCD_CTRL_WARMUPDLY_SHIFT 18 /**< Shift value for LCD_WARMUPDLY */
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#define _LCD_CTRL_WARMUPDLY_MASK 0x1C0000UL /**< Bit mask for LCD_WARMUPDLY */
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#define _LCD_CTRL_WARMUPDLY_DEFAULT 0x00000004UL /**< Mode DEFAULT for LCD_CTRL */
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#define _LCD_CTRL_WARMUPDLY_WARMUP1 0x00000000UL /**< Mode WARMUP1 for LCD_CTRL */
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#define _LCD_CTRL_WARMUPDLY_WARMUP31 0x00000001UL /**< Mode WARMUP31 for LCD_CTRL */
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#define _LCD_CTRL_WARMUPDLY_WARMUP63 0x00000002UL /**< Mode WARMUP63 for LCD_CTRL */
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#define _LCD_CTRL_WARMUPDLY_WARMUP125 0x00000003UL /**< Mode WARMUP125 for LCD_CTRL */
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#define _LCD_CTRL_WARMUPDLY_WARMUP250 0x00000004UL /**< Mode WARMUP250 for LCD_CTRL */
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#define _LCD_CTRL_WARMUPDLY_WARMUP500 0x00000005UL /**< Mode WARMUP500 for LCD_CTRL */
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#define _LCD_CTRL_WARMUPDLY_WARMUP1000 0x00000006UL /**< Mode WARMUP1000 for LCD_CTRL */
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#define _LCD_CTRL_WARMUPDLY_WARMUP2000 0x00000007UL /**< Mode WARMUP2000 for LCD_CTRL */
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#define LCD_CTRL_WARMUPDLY_DEFAULT (_LCD_CTRL_WARMUPDLY_DEFAULT << 18) /**< Shifted mode DEFAULT for LCD_CTRL */
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#define LCD_CTRL_WARMUPDLY_WARMUP1 (_LCD_CTRL_WARMUPDLY_WARMUP1 << 18) /**< Shifted mode WARMUP1 for LCD_CTRL */
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#define LCD_CTRL_WARMUPDLY_WARMUP31 (_LCD_CTRL_WARMUPDLY_WARMUP31 << 18) /**< Shifted mode WARMUP31 for LCD_CTRL */
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#define LCD_CTRL_WARMUPDLY_WARMUP63 (_LCD_CTRL_WARMUPDLY_WARMUP63 << 18) /**< Shifted mode WARMUP63 for LCD_CTRL */
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#define LCD_CTRL_WARMUPDLY_WARMUP125 (_LCD_CTRL_WARMUPDLY_WARMUP125 << 18) /**< Shifted mode WARMUP125 for LCD_CTRL */
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#define LCD_CTRL_WARMUPDLY_WARMUP250 (_LCD_CTRL_WARMUPDLY_WARMUP250 << 18) /**< Shifted mode WARMUP250 for LCD_CTRL */
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#define LCD_CTRL_WARMUPDLY_WARMUP500 (_LCD_CTRL_WARMUPDLY_WARMUP500 << 18) /**< Shifted mode WARMUP500 for LCD_CTRL */
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#define LCD_CTRL_WARMUPDLY_WARMUP1000 (_LCD_CTRL_WARMUPDLY_WARMUP1000 << 18) /**< Shifted mode WARMUP1000 for LCD_CTRL */
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#define LCD_CTRL_WARMUPDLY_WARMUP2000 (_LCD_CTRL_WARMUPDLY_WARMUP2000 << 18) /**< Shifted mode WARMUP2000 for LCD_CTRL */
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#define _LCD_CTRL_PRESCALE_SHIFT 24 /**< Shift value for LCD_PRESCALE */
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#define _LCD_CTRL_PRESCALE_MASK 0x7F000000UL /**< Bit mask for LCD_PRESCALE */
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#define _LCD_CTRL_PRESCALE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CTRL */
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#define LCD_CTRL_PRESCALE_DEFAULT (_LCD_CTRL_PRESCALE_DEFAULT << 24) /**< Shifted mode DEFAULT for LCD_CTRL */
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/* Bit fields for LCD CMD */
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#define _LCD_CMD_RESETVALUE 0x00000000UL /**< Default value for LCD_CMD */
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#define _LCD_CMD_MASK 0x00000003UL /**< Mask for LCD_CMD */
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#define LCD_CMD_LOAD (0x1UL << 0) /**< Load command */
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#define _LCD_CMD_LOAD_SHIFT 0 /**< Shift value for LCD_LOAD */
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#define _LCD_CMD_LOAD_MASK 0x1UL /**< Bit mask for LCD_LOAD */
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#define _LCD_CMD_LOAD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CMD */
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#define LCD_CMD_LOAD_DEFAULT (_LCD_CMD_LOAD_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_CMD */
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#define LCD_CMD_CLEAR (0x1UL << 1) /**< Clear command */
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#define _LCD_CMD_CLEAR_SHIFT 1 /**< Shift value for LCD_CLEAR */
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#define _LCD_CMD_CLEAR_MASK 0x2UL /**< Bit mask for LCD_CLEAR */
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#define _LCD_CMD_CLEAR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_CMD */
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#define LCD_CMD_CLEAR_DEFAULT (_LCD_CMD_CLEAR_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_CMD */
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/* Bit fields for LCD DISPCTRL */
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#define _LCD_DISPCTRL_RESETVALUE 0x00100000UL /**< Default value for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_MASK 0x03700017UL /**< Mask for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_MUX_SHIFT 0 /**< Shift value for LCD_MUX */
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#define _LCD_DISPCTRL_MUX_MASK 0x7UL /**< Bit mask for LCD_MUX */
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#define _LCD_DISPCTRL_MUX_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_MUX_STATIC 0x00000000UL /**< Mode STATIC for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_MUX_DUPLEX 0x00000001UL /**< Mode DUPLEX for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_MUX_TRIPLEX 0x00000002UL /**< Mode TRIPLEX for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_MUX_QUADRUPLEX 0x00000003UL /**< Mode QUADRUPLEX for LCD_DISPCTRL */
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#define LCD_DISPCTRL_MUX_DEFAULT (_LCD_DISPCTRL_MUX_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
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#define LCD_DISPCTRL_MUX_STATIC (_LCD_DISPCTRL_MUX_STATIC << 0) /**< Shifted mode STATIC for LCD_DISPCTRL */
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#define LCD_DISPCTRL_MUX_DUPLEX (_LCD_DISPCTRL_MUX_DUPLEX << 0) /**< Shifted mode DUPLEX for LCD_DISPCTRL */
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#define LCD_DISPCTRL_MUX_TRIPLEX (_LCD_DISPCTRL_MUX_TRIPLEX << 0) /**< Shifted mode TRIPLEX for LCD_DISPCTRL */
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#define LCD_DISPCTRL_MUX_QUADRUPLEX (_LCD_DISPCTRL_MUX_QUADRUPLEX << 0) /**< Shifted mode QUADRUPLEX for LCD_DISPCTRL */
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#define LCD_DISPCTRL_WAVE (0x1UL << 4) /**< Waveform Selection */
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#define _LCD_DISPCTRL_WAVE_SHIFT 4 /**< Shift value for LCD_WAVE */
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#define _LCD_DISPCTRL_WAVE_MASK 0x10UL /**< Bit mask for LCD_WAVE */
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#define _LCD_DISPCTRL_WAVE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_WAVE_TYPEB 0x00000000UL /**< Mode TYPEB for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_WAVE_TYPEA 0x00000001UL /**< Mode TYPEA for LCD_DISPCTRL */
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#define LCD_DISPCTRL_WAVE_DEFAULT (_LCD_DISPCTRL_WAVE_DEFAULT << 4) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
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#define LCD_DISPCTRL_WAVE_TYPEB (_LCD_DISPCTRL_WAVE_TYPEB << 4) /**< Shifted mode TYPEB for LCD_DISPCTRL */
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#define LCD_DISPCTRL_WAVE_TYPEA (_LCD_DISPCTRL_WAVE_TYPEA << 4) /**< Shifted mode TYPEA for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_CHGRDST_SHIFT 20 /**< Shift value for LCD_CHGRDST */
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#define _LCD_DISPCTRL_CHGRDST_MASK 0x700000UL /**< Bit mask for LCD_CHGRDST */
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#define _LCD_DISPCTRL_CHGRDST_DEFAULT 0x00000001UL /**< Mode DEFAULT for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_CHGRDST_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_CHGRDST_ONE 0x00000001UL /**< Mode ONE for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_CHGRDST_TWO 0x00000002UL /**< Mode TWO for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_CHGRDST_THREE 0x00000003UL /**< Mode THREE for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_CHGRDST_FOUR 0x00000004UL /**< Mode FOUR for LCD_DISPCTRL */
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#define LCD_DISPCTRL_CHGRDST_DEFAULT (_LCD_DISPCTRL_CHGRDST_DEFAULT << 20) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
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#define LCD_DISPCTRL_CHGRDST_DISABLE (_LCD_DISPCTRL_CHGRDST_DISABLE << 20) /**< Shifted mode DISABLE for LCD_DISPCTRL */
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#define LCD_DISPCTRL_CHGRDST_ONE (_LCD_DISPCTRL_CHGRDST_ONE << 20) /**< Shifted mode ONE for LCD_DISPCTRL */
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#define LCD_DISPCTRL_CHGRDST_TWO (_LCD_DISPCTRL_CHGRDST_TWO << 20) /**< Shifted mode TWO for LCD_DISPCTRL */
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#define LCD_DISPCTRL_CHGRDST_THREE (_LCD_DISPCTRL_CHGRDST_THREE << 20) /**< Shifted mode THREE for LCD_DISPCTRL */
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#define LCD_DISPCTRL_CHGRDST_FOUR (_LCD_DISPCTRL_CHGRDST_FOUR << 20) /**< Shifted mode FOUR for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_BIAS_SHIFT 24 /**< Shift value for LCD_BIAS */
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#define _LCD_DISPCTRL_BIAS_MASK 0x3000000UL /**< Bit mask for LCD_BIAS */
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#define _LCD_DISPCTRL_BIAS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_BIAS_STATIC 0x00000000UL /**< Mode STATIC for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_BIAS_ONEHALF 0x00000001UL /**< Mode ONEHALF for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_BIAS_ONETHIRD 0x00000002UL /**< Mode ONETHIRD for LCD_DISPCTRL */
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#define _LCD_DISPCTRL_BIAS_ONEFOURTH 0x00000003UL /**< Mode ONEFOURTH for LCD_DISPCTRL */
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#define LCD_DISPCTRL_BIAS_DEFAULT (_LCD_DISPCTRL_BIAS_DEFAULT << 24) /**< Shifted mode DEFAULT for LCD_DISPCTRL */
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#define LCD_DISPCTRL_BIAS_STATIC (_LCD_DISPCTRL_BIAS_STATIC << 24) /**< Shifted mode STATIC for LCD_DISPCTRL */
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#define LCD_DISPCTRL_BIAS_ONEHALF (_LCD_DISPCTRL_BIAS_ONEHALF << 24) /**< Shifted mode ONEHALF for LCD_DISPCTRL */
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#define LCD_DISPCTRL_BIAS_ONETHIRD (_LCD_DISPCTRL_BIAS_ONETHIRD << 24) /**< Shifted mode ONETHIRD for LCD_DISPCTRL */
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#define LCD_DISPCTRL_BIAS_ONEFOURTH (_LCD_DISPCTRL_BIAS_ONEFOURTH << 24) /**< Shifted mode ONEFOURTH for LCD_DISPCTRL */
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/* Bit fields for LCD BACFG */
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#define _LCD_BACFG_RESETVALUE 0x00000007UL /**< Default value for LCD_BACFG */
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#define _LCD_BACFG_MASK 0x00FF0007UL /**< Mask for LCD_BACFG */
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#define _LCD_BACFG_ASTATETOP_SHIFT 0 /**< Shift value for LCD_ASTATETOP */
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#define _LCD_BACFG_ASTATETOP_MASK 0x7UL /**< Bit mask for LCD_ASTATETOP */
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#define _LCD_BACFG_ASTATETOP_DEFAULT 0x00000007UL /**< Mode DEFAULT for LCD_BACFG */
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#define LCD_BACFG_ASTATETOP_DEFAULT (_LCD_BACFG_ASTATETOP_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_BACFG */
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#define _LCD_BACFG_FCPRESC_SHIFT 16 /**< Shift value for LCD_FCPRESC */
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#define _LCD_BACFG_FCPRESC_MASK 0x30000UL /**< Bit mask for LCD_FCPRESC */
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#define _LCD_BACFG_FCPRESC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACFG */
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#define _LCD_BACFG_FCPRESC_DIV1 0x00000000UL /**< Mode DIV1 for LCD_BACFG */
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#define _LCD_BACFG_FCPRESC_DIV2 0x00000001UL /**< Mode DIV2 for LCD_BACFG */
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#define _LCD_BACFG_FCPRESC_DIV4 0x00000002UL /**< Mode DIV4 for LCD_BACFG */
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#define _LCD_BACFG_FCPRESC_DIV8 0x00000003UL /**< Mode DIV8 for LCD_BACFG */
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#define LCD_BACFG_FCPRESC_DEFAULT (_LCD_BACFG_FCPRESC_DEFAULT << 16) /**< Shifted mode DEFAULT for LCD_BACFG */
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#define LCD_BACFG_FCPRESC_DIV1 (_LCD_BACFG_FCPRESC_DIV1 << 16) /**< Shifted mode DIV1 for LCD_BACFG */
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#define LCD_BACFG_FCPRESC_DIV2 (_LCD_BACFG_FCPRESC_DIV2 << 16) /**< Shifted mode DIV2 for LCD_BACFG */
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#define LCD_BACFG_FCPRESC_DIV4 (_LCD_BACFG_FCPRESC_DIV4 << 16) /**< Shifted mode DIV4 for LCD_BACFG */
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#define LCD_BACFG_FCPRESC_DIV8 (_LCD_BACFG_FCPRESC_DIV8 << 16) /**< Shifted mode DIV8 for LCD_BACFG */
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#define _LCD_BACFG_FCTOP_SHIFT 18 /**< Shift value for LCD_FCTOP */
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#define _LCD_BACFG_FCTOP_MASK 0xFC0000UL /**< Bit mask for LCD_FCTOP */
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#define _LCD_BACFG_FCTOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACFG */
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#define LCD_BACFG_FCTOP_DEFAULT (_LCD_BACFG_FCTOP_DEFAULT << 18) /**< Shifted mode DEFAULT for LCD_BACFG */
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/* Bit fields for LCD BACTRL */
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#define _LCD_BACTRL_RESETVALUE 0x00000000UL /**< Default value for LCD_BACTRL */
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#define _LCD_BACTRL_MASK 0x100003FFUL /**< Mask for LCD_BACTRL */
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#define LCD_BACTRL_BLINKEN (0x1UL << 0) /**< Blink Enable */
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#define _LCD_BACTRL_BLINKEN_SHIFT 0 /**< Shift value for LCD_BLINKEN */
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#define _LCD_BACTRL_BLINKEN_MASK 0x1UL /**< Bit mask for LCD_BLINKEN */
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#define _LCD_BACTRL_BLINKEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_BLINKEN_DEFAULT (_LCD_BACTRL_BLINKEN_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_BLANK (0x1UL << 1) /**< Blank Display */
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#define _LCD_BACTRL_BLANK_SHIFT 1 /**< Shift value for LCD_BLANK */
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#define _LCD_BACTRL_BLANK_MASK 0x2UL /**< Bit mask for LCD_BLANK */
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#define _LCD_BACTRL_BLANK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
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#define _LCD_BACTRL_BLANK_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_BACTRL */
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#define _LCD_BACTRL_BLANK_ENABLE 0x00000001UL /**< Mode ENABLE for LCD_BACTRL */
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#define LCD_BACTRL_BLANK_DEFAULT (_LCD_BACTRL_BLANK_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_BLANK_DISABLE (_LCD_BACTRL_BLANK_DISABLE << 1) /**< Shifted mode DISABLE for LCD_BACTRL */
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#define LCD_BACTRL_BLANK_ENABLE (_LCD_BACTRL_BLANK_ENABLE << 1) /**< Shifted mode ENABLE for LCD_BACTRL */
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#define LCD_BACTRL_AEN (0x1UL << 2) /**< Animation Enable */
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#define _LCD_BACTRL_AEN_SHIFT 2 /**< Shift value for LCD_AEN */
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#define _LCD_BACTRL_AEN_MASK 0x4UL /**< Bit mask for LCD_AEN */
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#define _LCD_BACTRL_AEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_AEN_DEFAULT (_LCD_BACTRL_AEN_DEFAULT << 2) /**< Shifted mode DEFAULT for LCD_BACTRL */
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#define _LCD_BACTRL_AREGASC_SHIFT 3 /**< Shift value for LCD_AREGASC */
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#define _LCD_BACTRL_AREGASC_MASK 0x18UL /**< Bit mask for LCD_AREGASC */
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#define _LCD_BACTRL_AREGASC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
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#define _LCD_BACTRL_AREGASC_NOSHIFT 0x00000000UL /**< Mode NOSHIFT for LCD_BACTRL */
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#define _LCD_BACTRL_AREGASC_SHIFTLEFT 0x00000001UL /**< Mode SHIFTLEFT for LCD_BACTRL */
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#define _LCD_BACTRL_AREGASC_SHIFTRIGHT 0x00000002UL /**< Mode SHIFTRIGHT for LCD_BACTRL */
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#define LCD_BACTRL_AREGASC_DEFAULT (_LCD_BACTRL_AREGASC_DEFAULT << 3) /**< Shifted mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_AREGASC_NOSHIFT (_LCD_BACTRL_AREGASC_NOSHIFT << 3) /**< Shifted mode NOSHIFT for LCD_BACTRL */
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#define LCD_BACTRL_AREGASC_SHIFTLEFT (_LCD_BACTRL_AREGASC_SHIFTLEFT << 3) /**< Shifted mode SHIFTLEFT for LCD_BACTRL */
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#define LCD_BACTRL_AREGASC_SHIFTRIGHT (_LCD_BACTRL_AREGASC_SHIFTRIGHT << 3) /**< Shifted mode SHIFTRIGHT for LCD_BACTRL */
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#define _LCD_BACTRL_AREGBSC_SHIFT 5 /**< Shift value for LCD_AREGBSC */
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#define _LCD_BACTRL_AREGBSC_MASK 0x60UL /**< Bit mask for LCD_AREGBSC */
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#define _LCD_BACTRL_AREGBSC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
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#define _LCD_BACTRL_AREGBSC_NOSHIFT 0x00000000UL /**< Mode NOSHIFT for LCD_BACTRL */
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#define _LCD_BACTRL_AREGBSC_SHIFTLEFT 0x00000001UL /**< Mode SHIFTLEFT for LCD_BACTRL */
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#define _LCD_BACTRL_AREGBSC_SHIFTRIGHT 0x00000002UL /**< Mode SHIFTRIGHT for LCD_BACTRL */
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#define LCD_BACTRL_AREGBSC_DEFAULT (_LCD_BACTRL_AREGBSC_DEFAULT << 5) /**< Shifted mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_AREGBSC_NOSHIFT (_LCD_BACTRL_AREGBSC_NOSHIFT << 5) /**< Shifted mode NOSHIFT for LCD_BACTRL */
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#define LCD_BACTRL_AREGBSC_SHIFTLEFT (_LCD_BACTRL_AREGBSC_SHIFTLEFT << 5) /**< Shifted mode SHIFTLEFT for LCD_BACTRL */
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#define LCD_BACTRL_AREGBSC_SHIFTRIGHT (_LCD_BACTRL_AREGBSC_SHIFTRIGHT << 5) /**< Shifted mode SHIFTRIGHT for LCD_BACTRL */
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#define LCD_BACTRL_ALOGSEL (0x1UL << 7) /**< Animate Logic Function Select */
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#define _LCD_BACTRL_ALOGSEL_SHIFT 7 /**< Shift value for LCD_ALOGSEL */
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#define _LCD_BACTRL_ALOGSEL_MASK 0x80UL /**< Bit mask for LCD_ALOGSEL */
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#define _LCD_BACTRL_ALOGSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
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#define _LCD_BACTRL_ALOGSEL_AND 0x00000000UL /**< Mode AND for LCD_BACTRL */
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#define _LCD_BACTRL_ALOGSEL_OR 0x00000001UL /**< Mode OR for LCD_BACTRL */
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#define LCD_BACTRL_ALOGSEL_DEFAULT (_LCD_BACTRL_ALOGSEL_DEFAULT << 7) /**< Shifted mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_ALOGSEL_AND (_LCD_BACTRL_ALOGSEL_AND << 7) /**< Shifted mode AND for LCD_BACTRL */
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#define LCD_BACTRL_ALOGSEL_OR (_LCD_BACTRL_ALOGSEL_OR << 7) /**< Shifted mode OR for LCD_BACTRL */
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#define LCD_BACTRL_FCEN (0x1UL << 8) /**< Frame Counter Enable */
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#define _LCD_BACTRL_FCEN_SHIFT 8 /**< Shift value for LCD_FCEN */
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#define _LCD_BACTRL_FCEN_MASK 0x100UL /**< Bit mask for LCD_FCEN */
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#define _LCD_BACTRL_FCEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_FCEN_DEFAULT (_LCD_BACTRL_FCEN_DEFAULT << 8) /**< Shifted mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_DISPLAYCNTEN (0x1UL << 9) /**< Display Counter Enable */
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#define _LCD_BACTRL_DISPLAYCNTEN_SHIFT 9 /**< Shift value for LCD_DISPLAYCNTEN */
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#define _LCD_BACTRL_DISPLAYCNTEN_MASK 0x200UL /**< Bit mask for LCD_DISPLAYCNTEN */
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#define _LCD_BACTRL_DISPLAYCNTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
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#define _LCD_BACTRL_DISPLAYCNTEN_DISABLE 0x00000000UL /**< Mode DISABLE for LCD_BACTRL */
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#define _LCD_BACTRL_DISPLAYCNTEN_ENABLE 0x00000001UL /**< Mode ENABLE for LCD_BACTRL */
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#define LCD_BACTRL_DISPLAYCNTEN_DEFAULT (_LCD_BACTRL_DISPLAYCNTEN_DEFAULT << 9) /**< Shifted mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_DISPLAYCNTEN_DISABLE (_LCD_BACTRL_DISPLAYCNTEN_DISABLE << 9) /**< Shifted mode DISABLE for LCD_BACTRL */
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#define LCD_BACTRL_DISPLAYCNTEN_ENABLE (_LCD_BACTRL_DISPLAYCNTEN_ENABLE << 9) /**< Shifted mode ENABLE for LCD_BACTRL */
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#define LCD_BACTRL_ALOC (0x1UL << 28) /**< Animation Location */
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#define _LCD_BACTRL_ALOC_SHIFT 28 /**< Shift value for LCD_ALOC */
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#define _LCD_BACTRL_ALOC_MASK 0x10000000UL /**< Bit mask for LCD_ALOC */
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#define _LCD_BACTRL_ALOC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BACTRL */
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#define _LCD_BACTRL_ALOC_SEG0TO7 0x00000000UL /**< Mode SEG0TO7 for LCD_BACTRL */
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#define _LCD_BACTRL_ALOC_SEG8TO15 0x00000001UL /**< Mode SEG8TO15 for LCD_BACTRL */
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#define LCD_BACTRL_ALOC_DEFAULT (_LCD_BACTRL_ALOC_DEFAULT << 28) /**< Shifted mode DEFAULT for LCD_BACTRL */
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#define LCD_BACTRL_ALOC_SEG0TO7 (_LCD_BACTRL_ALOC_SEG0TO7 << 28) /**< Shifted mode SEG0TO7 for LCD_BACTRL */
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#define LCD_BACTRL_ALOC_SEG8TO15 (_LCD_BACTRL_ALOC_SEG8TO15 << 28) /**< Shifted mode SEG8TO15 for LCD_BACTRL */
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/* Bit fields for LCD STATUS */
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#define _LCD_STATUS_RESETVALUE 0x00000000UL /**< Default value for LCD_STATUS */
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#define _LCD_STATUS_MASK 0x0000090FUL /**< Mask for LCD_STATUS */
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#define _LCD_STATUS_ASTATE_SHIFT 0 /**< Shift value for LCD_ASTATE */
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#define _LCD_STATUS_ASTATE_MASK 0xFUL /**< Bit mask for LCD_ASTATE */
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#define _LCD_STATUS_ASTATE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_STATUS */
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#define LCD_STATUS_ASTATE_DEFAULT (_LCD_STATUS_ASTATE_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_STATUS */
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#define LCD_STATUS_BLINK (0x1UL << 8) /**< Blink State */
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#define _LCD_STATUS_BLINK_SHIFT 8 /**< Shift value for LCD_BLINK */
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#define _LCD_STATUS_BLINK_MASK 0x100UL /**< Bit mask for LCD_BLINK */
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#define _LCD_STATUS_BLINK_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_STATUS */
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#define LCD_STATUS_BLINK_DEFAULT (_LCD_STATUS_BLINK_DEFAULT << 8) /**< Shifted mode DEFAULT for LCD_STATUS */
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#define LCD_STATUS_LOADBUSY (0x1UL << 11) /**< Load Synchronization is busy */
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#define _LCD_STATUS_LOADBUSY_SHIFT 11 /**< Shift value for LCD_LOADBUSY */
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#define _LCD_STATUS_LOADBUSY_MASK 0x800UL /**< Bit mask for LCD_LOADBUSY */
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#define _LCD_STATUS_LOADBUSY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_STATUS */
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#define LCD_STATUS_LOADBUSY_DEFAULT (_LCD_STATUS_LOADBUSY_DEFAULT << 11) /**< Shifted mode DEFAULT for LCD_STATUS */
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/* Bit fields for LCD AREGA */
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#define _LCD_AREGA_RESETVALUE 0x00000000UL /**< Default value for LCD_AREGA */
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#define _LCD_AREGA_MASK 0x000000FFUL /**< Mask for LCD_AREGA */
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#define _LCD_AREGA_AREGA_SHIFT 0 /**< Shift value for LCD_AREGA */
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#define _LCD_AREGA_AREGA_MASK 0xFFUL /**< Bit mask for LCD_AREGA */
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#define _LCD_AREGA_AREGA_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_AREGA */
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#define LCD_AREGA_AREGA_DEFAULT (_LCD_AREGA_AREGA_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_AREGA */
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/* Bit fields for LCD AREGB */
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#define _LCD_AREGB_RESETVALUE 0x00000000UL /**< Default value for LCD_AREGB */
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#define _LCD_AREGB_MASK 0x000000FFUL /**< Mask for LCD_AREGB */
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#define _LCD_AREGB_AREGB_SHIFT 0 /**< Shift value for LCD_AREGB */
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#define _LCD_AREGB_AREGB_MASK 0xFFUL /**< Bit mask for LCD_AREGB */
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#define _LCD_AREGB_AREGB_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_AREGB */
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#define LCD_AREGB_AREGB_DEFAULT (_LCD_AREGB_AREGB_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_AREGB */
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/* Bit fields for LCD IF */
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#define _LCD_IF_RESETVALUE 0x00000000UL /**< Default value for LCD_IF */
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#define _LCD_IF_MASK 0x00000007UL /**< Mask for LCD_IF */
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#define LCD_IF_FC (0x1UL << 0) /**< Frame Counter */
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#define _LCD_IF_FC_SHIFT 0 /**< Shift value for LCD_FC */
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#define _LCD_IF_FC_MASK 0x1UL /**< Bit mask for LCD_FC */
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#define _LCD_IF_FC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IF */
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#define LCD_IF_FC_DEFAULT (_LCD_IF_FC_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_IF */
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#define LCD_IF_DISPLAY (0x1UL << 1) /**< Display Update Event */
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#define _LCD_IF_DISPLAY_SHIFT 1 /**< Shift value for LCD_DISPLAY */
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#define _LCD_IF_DISPLAY_MASK 0x2UL /**< Bit mask for LCD_DISPLAY */
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#define _LCD_IF_DISPLAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IF */
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#define LCD_IF_DISPLAY_DEFAULT (_LCD_IF_DISPLAY_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_IF */
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#define LCD_IF_SYNCBUSYDONE (0x1UL << 2) /**< Synchronization is Done */
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#define _LCD_IF_SYNCBUSYDONE_SHIFT 2 /**< Shift value for LCD_SYNCBUSYDONE */
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#define _LCD_IF_SYNCBUSYDONE_MASK 0x4UL /**< Bit mask for LCD_SYNCBUSYDONE */
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#define _LCD_IF_SYNCBUSYDONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IF */
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#define LCD_IF_SYNCBUSYDONE_DEFAULT (_LCD_IF_SYNCBUSYDONE_DEFAULT << 2) /**< Shifted mode DEFAULT for LCD_IF */
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/* Bit fields for LCD IEN */
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#define _LCD_IEN_RESETVALUE 0x00000000UL /**< Default value for LCD_IEN */
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#define _LCD_IEN_MASK 0x00000007UL /**< Mask for LCD_IEN */
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#define LCD_IEN_FC (0x1UL << 0) /**< Frame Counter */
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#define _LCD_IEN_FC_SHIFT 0 /**< Shift value for LCD_FC */
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#define _LCD_IEN_FC_MASK 0x1UL /**< Bit mask for LCD_FC */
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#define _LCD_IEN_FC_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IEN */
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#define LCD_IEN_FC_DEFAULT (_LCD_IEN_FC_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_IEN */
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#define LCD_IEN_DISPLAY (0x1UL << 1) /**< Display Update Event */
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#define _LCD_IEN_DISPLAY_SHIFT 1 /**< Shift value for LCD_DISPLAY */
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#define _LCD_IEN_DISPLAY_MASK 0x2UL /**< Bit mask for LCD_DISPLAY */
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#define _LCD_IEN_DISPLAY_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IEN */
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#define LCD_IEN_DISPLAY_DEFAULT (_LCD_IEN_DISPLAY_DEFAULT << 1) /**< Shifted mode DEFAULT for LCD_IEN */
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#define LCD_IEN_SYNCBUSYDONE (0x1UL << 2) /**< Sync Busy Done */
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#define _LCD_IEN_SYNCBUSYDONE_SHIFT 2 /**< Shift value for LCD_SYNCBUSYDONE */
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#define _LCD_IEN_SYNCBUSYDONE_MASK 0x4UL /**< Bit mask for LCD_SYNCBUSYDONE */
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#define _LCD_IEN_SYNCBUSYDONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_IEN */
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#define LCD_IEN_SYNCBUSYDONE_DEFAULT (_LCD_IEN_SYNCBUSYDONE_DEFAULT << 2) /**< Shifted mode DEFAULT for LCD_IEN */
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/* Bit fields for LCD BIASCTRL */
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#define _LCD_BIASCTRL_RESETVALUE 0x001F0000UL /**< Default value for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_MASK 0xC45F137FUL /**< Mask for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_RESISTOR_SHIFT 0 /**< Shift value for LCD_RESISTOR */
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#define _LCD_BIASCTRL_RESISTOR_MASK 0xFUL /**< Bit mask for LCD_RESISTOR */
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#define _LCD_BIASCTRL_RESISTOR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_RESISTOR_DEFAULT (_LCD_BIASCTRL_RESISTOR_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_BUFDRV_SHIFT 4 /**< Shift value for LCD_BUFDRV */
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#define _LCD_BIASCTRL_BUFDRV_MASK 0x70UL /**< Bit mask for LCD_BUFDRV */
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#define _LCD_BIASCTRL_BUFDRV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_BUFDRV_DEFAULT (_LCD_BIASCTRL_BUFDRV_DEFAULT << 4) /**< Shifted mode DEFAULT for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_BUFBIAS_SHIFT 8 /**< Shift value for LCD_BUFBIAS */
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#define _LCD_BIASCTRL_BUFBIAS_MASK 0x300UL /**< Bit mask for LCD_BUFBIAS */
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#define _LCD_BIASCTRL_BUFBIAS_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_BUFBIAS_DEFAULT (_LCD_BIASCTRL_BUFBIAS_DEFAULT << 8) /**< Shifted mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_MODE (0x1UL << 12) /**< Mode Setting */
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#define _LCD_BIASCTRL_MODE_SHIFT 12 /**< Shift value for LCD_MODE */
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#define _LCD_BIASCTRL_MODE_MASK 0x1000UL /**< Bit mask for LCD_MODE */
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#define _LCD_BIASCTRL_MODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_MODE_STEPDOWN 0x00000000UL /**< Mode STEPDOWN for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_MODE_CHARGEPUMP 0x00000001UL /**< Mode CHARGEPUMP for LCD_BIASCTRL */
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#define LCD_BIASCTRL_MODE_DEFAULT (_LCD_BIASCTRL_MODE_DEFAULT << 12) /**< Shifted mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_MODE_STEPDOWN (_LCD_BIASCTRL_MODE_STEPDOWN << 12) /**< Shifted mode STEPDOWN for LCD_BIASCTRL */
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#define LCD_BIASCTRL_MODE_CHARGEPUMP (_LCD_BIASCTRL_MODE_CHARGEPUMP << 12) /**< Shifted mode CHARGEPUMP for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_VLCD_SHIFT 16 /**< Shift value for LCD_VLCD */
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#define _LCD_BIASCTRL_VLCD_MASK 0x1F0000UL /**< Bit mask for LCD_VLCD */
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#define _LCD_BIASCTRL_VLCD_DEFAULT 0x0000001FUL /**< Mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_VLCD_DEFAULT (_LCD_BIASCTRL_VLCD_DEFAULT << 16) /**< Shifted mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_VDDXSEL (0x1UL << 22) /**< VDDX select */
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#define _LCD_BIASCTRL_VDDXSEL_SHIFT 22 /**< Shift value for LCD_VDDXSEL */
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#define _LCD_BIASCTRL_VDDXSEL_MASK 0x400000UL /**< Bit mask for LCD_VDDXSEL */
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#define _LCD_BIASCTRL_VDDXSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_VDDXSEL_DVDD 0x00000000UL /**< Mode DVDD for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_VDDXSEL_AVDD 0x00000001UL /**< Mode AVDD for LCD_BIASCTRL */
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#define LCD_BIASCTRL_VDDXSEL_DEFAULT (_LCD_BIASCTRL_VDDXSEL_DEFAULT << 22) /**< Shifted mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_VDDXSEL_DVDD (_LCD_BIASCTRL_VDDXSEL_DVDD << 22) /**< Shifted mode DVDD for LCD_BIASCTRL */
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#define LCD_BIASCTRL_VDDXSEL_AVDD (_LCD_BIASCTRL_VDDXSEL_AVDD << 22) /**< Shifted mode AVDD for LCD_BIASCTRL */
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#define LCD_BIASCTRL_LCDGATE (0x1UL << 26) /**< LCD Gate */
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#define _LCD_BIASCTRL_LCDGATE_SHIFT 26 /**< Shift value for LCD_LCDGATE */
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#define _LCD_BIASCTRL_LCDGATE_MASK 0x4000000UL /**< Bit mask for LCD_LCDGATE */
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#define _LCD_BIASCTRL_LCDGATE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_LCDGATE_UNGATE 0x00000000UL /**< Mode UNGATE for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_LCDGATE_GATE 0x00000001UL /**< Mode GATE for LCD_BIASCTRL */
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#define LCD_BIASCTRL_LCDGATE_DEFAULT (_LCD_BIASCTRL_LCDGATE_DEFAULT << 26) /**< Shifted mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_LCDGATE_UNGATE (_LCD_BIASCTRL_LCDGATE_UNGATE << 26) /**< Shifted mode UNGATE for LCD_BIASCTRL */
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#define LCD_BIASCTRL_LCDGATE_GATE (_LCD_BIASCTRL_LCDGATE_GATE << 26) /**< Shifted mode GATE for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_DMAMODE_SHIFT 30 /**< Shift value for LCD_DMAMODE */
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#define _LCD_BIASCTRL_DMAMODE_MASK 0xC0000000UL /**< Bit mask for LCD_DMAMODE */
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#define _LCD_BIASCTRL_DMAMODE_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_DMAMODE_DMADISABLE 0x00000000UL /**< Mode DMADISABLE for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_DMAMODE_DMAFC 0x00000001UL /**< Mode DMAFC for LCD_BIASCTRL */
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#define _LCD_BIASCTRL_DMAMODE_DMADISPLAY 0x00000002UL /**< Mode DMADISPLAY for LCD_BIASCTRL */
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#define LCD_BIASCTRL_DMAMODE_DEFAULT (_LCD_BIASCTRL_DMAMODE_DEFAULT << 30) /**< Shifted mode DEFAULT for LCD_BIASCTRL */
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#define LCD_BIASCTRL_DMAMODE_DMADISABLE (_LCD_BIASCTRL_DMAMODE_DMADISABLE << 30) /**< Shifted mode DMADISABLE for LCD_BIASCTRL */
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#define LCD_BIASCTRL_DMAMODE_DMAFC (_LCD_BIASCTRL_DMAMODE_DMAFC << 30) /**< Shifted mode DMAFC for LCD_BIASCTRL */
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#define LCD_BIASCTRL_DMAMODE_DMADISPLAY (_LCD_BIASCTRL_DMAMODE_DMADISPLAY << 30) /**< Shifted mode DMADISPLAY for LCD_BIASCTRL */
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/* Bit fields for LCD DISPCTRLX */
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#define _LCD_DISPCTRLX_RESETVALUE 0x00000000UL /**< Default value for LCD_DISPCTRLX */
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#define _LCD_DISPCTRLX_MASK 0x000003FFUL /**< Mask for LCD_DISPCTRLX */
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#define _LCD_DISPCTRLX_DISPLAYDIV_SHIFT 0 /**< Shift value for LCD_DISPLAYDIV */
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#define _LCD_DISPCTRLX_DISPLAYDIV_MASK 0x3FFUL /**< Bit mask for LCD_DISPLAYDIV */
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#define _LCD_DISPCTRLX_DISPLAYDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_DISPCTRLX */
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#define LCD_DISPCTRLX_DISPLAYDIV_DEFAULT (_LCD_DISPCTRLX_DISPLAYDIV_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_DISPCTRLX */
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/* Bit fields for LCD SEGD0 */
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#define _LCD_SEGD0_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD0 */
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#define _LCD_SEGD0_MASK 0x000FFFFFUL /**< Mask for LCD_SEGD0 */
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#define _LCD_SEGD0_SEGD0_SHIFT 0 /**< Shift value for LCD_SEGD0 */
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#define _LCD_SEGD0_SEGD0_MASK 0xFFFFFUL /**< Bit mask for LCD_SEGD0 */
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#define _LCD_SEGD0_SEGD0_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD0 */
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#define LCD_SEGD0_SEGD0_DEFAULT (_LCD_SEGD0_SEGD0_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SEGD0 */
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/* Bit fields for LCD SEGD1 */
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#define _LCD_SEGD1_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD1 */
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#define _LCD_SEGD1_MASK 0x000FFFFFUL /**< Mask for LCD_SEGD1 */
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#define _LCD_SEGD1_SEGD1_SHIFT 0 /**< Shift value for LCD_SEGD1 */
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#define _LCD_SEGD1_SEGD1_MASK 0xFFFFFUL /**< Bit mask for LCD_SEGD1 */
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#define _LCD_SEGD1_SEGD1_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD1 */
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#define LCD_SEGD1_SEGD1_DEFAULT (_LCD_SEGD1_SEGD1_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SEGD1 */
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/* Bit fields for LCD SEGD2 */
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#define _LCD_SEGD2_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD2 */
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#define _LCD_SEGD2_MASK 0x000FFFFFUL /**< Mask for LCD_SEGD2 */
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#define _LCD_SEGD2_SEGD2_SHIFT 0 /**< Shift value for LCD_SEGD2 */
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#define _LCD_SEGD2_SEGD2_MASK 0xFFFFFUL /**< Bit mask for LCD_SEGD2 */
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#define _LCD_SEGD2_SEGD2_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD2 */
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#define LCD_SEGD2_SEGD2_DEFAULT (_LCD_SEGD2_SEGD2_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SEGD2 */
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/* Bit fields for LCD SEGD3 */
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#define _LCD_SEGD3_RESETVALUE 0x00000000UL /**< Default value for LCD_SEGD3 */
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#define _LCD_SEGD3_MASK 0x000FFFFFUL /**< Mask for LCD_SEGD3 */
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#define _LCD_SEGD3_SEGD3_SHIFT 0 /**< Shift value for LCD_SEGD3 */
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#define _LCD_SEGD3_SEGD3_MASK 0xFFFFFUL /**< Bit mask for LCD_SEGD3 */
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#define _LCD_SEGD3_SEGD3_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_SEGD3 */
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#define LCD_SEGD3_SEGD3_DEFAULT (_LCD_SEGD3_SEGD3_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_SEGD3 */
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/* Bit fields for LCD UPDATECTRL */
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#define _LCD_UPDATECTRL_RESETVALUE 0x00000000UL /**< Default value for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_MASK 0x0001E100UL /**< Mask for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_AUTOLOAD (0x1UL << 8) /**< Auto Load */
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#define _LCD_UPDATECTRL_AUTOLOAD_SHIFT 8 /**< Shift value for LCD_AUTOLOAD */
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#define _LCD_UPDATECTRL_AUTOLOAD_MASK 0x100UL /**< Bit mask for LCD_AUTOLOAD */
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#define _LCD_UPDATECTRL_AUTOLOAD_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_AUTOLOAD_MANUAL 0x00000000UL /**< Mode MANUAL for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_AUTOLOAD_AUTO 0x00000001UL /**< Mode AUTO for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_AUTOLOAD_DEFAULT (_LCD_UPDATECTRL_AUTOLOAD_DEFAULT << 8) /**< Shifted mode DEFAULT for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_AUTOLOAD_MANUAL (_LCD_UPDATECTRL_AUTOLOAD_MANUAL << 8) /**< Shifted mode MANUAL for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_AUTOLOAD_AUTO (_LCD_UPDATECTRL_AUTOLOAD_AUTO << 8) /**< Shifted mode AUTO for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_LOADADDR_SHIFT 13 /**< Shift value for LCD_LOADADDR */
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#define _LCD_UPDATECTRL_LOADADDR_MASK 0x1E000UL /**< Bit mask for LCD_LOADADDR */
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#define _LCD_UPDATECTRL_LOADADDR_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_LOADADDR_BACTRLWR 0x00000000UL /**< Mode BACTRLWR for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_LOADADDR_AREGAWR 0x00000001UL /**< Mode AREGAWR for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_LOADADDR_AREGBWR 0x00000002UL /**< Mode AREGBWR for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_LOADADDR_SEGD0WR 0x00000003UL /**< Mode SEGD0WR for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_LOADADDR_SEGD1WR 0x00000004UL /**< Mode SEGD1WR for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_LOADADDR_SEGD2WR 0x00000005UL /**< Mode SEGD2WR for LCD_UPDATECTRL */
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#define _LCD_UPDATECTRL_LOADADDR_SEGD3WR 0x00000006UL /**< Mode SEGD3WR for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_LOADADDR_DEFAULT (_LCD_UPDATECTRL_LOADADDR_DEFAULT << 13) /**< Shifted mode DEFAULT for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_LOADADDR_BACTRLWR (_LCD_UPDATECTRL_LOADADDR_BACTRLWR << 13) /**< Shifted mode BACTRLWR for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_LOADADDR_AREGAWR (_LCD_UPDATECTRL_LOADADDR_AREGAWR << 13) /**< Shifted mode AREGAWR for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_LOADADDR_AREGBWR (_LCD_UPDATECTRL_LOADADDR_AREGBWR << 13) /**< Shifted mode AREGBWR for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_LOADADDR_SEGD0WR (_LCD_UPDATECTRL_LOADADDR_SEGD0WR << 13) /**< Shifted mode SEGD0WR for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_LOADADDR_SEGD1WR (_LCD_UPDATECTRL_LOADADDR_SEGD1WR << 13) /**< Shifted mode SEGD1WR for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_LOADADDR_SEGD2WR (_LCD_UPDATECTRL_LOADADDR_SEGD2WR << 13) /**< Shifted mode SEGD2WR for LCD_UPDATECTRL */
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#define LCD_UPDATECTRL_LOADADDR_SEGD3WR (_LCD_UPDATECTRL_LOADADDR_SEGD3WR << 13) /**< Shifted mode SEGD3WR for LCD_UPDATECTRL */
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/* Bit fields for LCD FRAMERATE */
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#define _LCD_FRAMERATE_RESETVALUE 0x00000000UL /**< Default value for LCD_FRAMERATE */
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#define _LCD_FRAMERATE_MASK 0x000001FFUL /**< Mask for LCD_FRAMERATE */
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#define _LCD_FRAMERATE_FRDIV_SHIFT 0 /**< Shift value for LCD_FRDIV */
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#define _LCD_FRAMERATE_FRDIV_MASK 0x1FFUL /**< Bit mask for LCD_FRDIV */
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#define _LCD_FRAMERATE_FRDIV_DEFAULT 0x00000000UL /**< Mode DEFAULT for LCD_FRAMERATE */
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#define LCD_FRAMERATE_FRDIV_DEFAULT (_LCD_FRAMERATE_FRDIV_DEFAULT << 0) /**< Shifted mode DEFAULT for LCD_FRAMERATE */
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/** @} End of group EFR32ZG23_LCD_BitFields */
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/** @} End of group EFR32ZG23_LCD */
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/** @} End of group Parts */
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#endif /* EFR32ZG23_LCD_H */
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#ifdef __cplusplus
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}
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#endif
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