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8b1c43afb0
Expose the compile time configuration knob `CONFIG_AFIO_PCF0_SWJ_CFG` to allow freeing some/all JTAG pins and use them as GPIOs. As default, PB4 is remapped from NJTRST to be usable as regular GPIO. This still allows using the JTAG interface for debugging/flashing, but makes an GPIO exposed by some boards available. |
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.. | ||
vendor | ||
cpu_conf.h | ||
cpu.h | ||
gpio_ll_arch.h | ||
periph_cpu.h |