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107 lines
2.0 KiB
C
107 lines
2.0 KiB
C
/*
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* Copyright (C) 2016 Leon George
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_cc2650stk
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the CC2650STK board
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*
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* @author Leon M. George <leon@georgemail.eu>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock configuration
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* @{
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*/
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/* the main clock is fixed to 48MHZ */
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#define CLOCK_CORECLOCK (48000000U)
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/** @} */
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/**
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* @name Timer configuration
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*
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* General purpose timers (GPT[0-3]) are configured consecutively and in order
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* (without gaps) starting from GPT0, i.e. if multiple timers are enabled.
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*
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.cfg = GPT_CFG_16T,
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.chn = 2,
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},
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{
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.cfg = GPT_CFG_32T,
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.chn = 1,
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},
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{
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.cfg = GPT_CFG_16T,
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.chn = 2,
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},
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{
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.cfg = GPT_CFG_32T,
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.chn = 1,
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}
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};
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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/**
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* @name UART configuration
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*
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* The used CC26x0 CPU only supports a single UART device, so all we need to
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* configure are the RX and TX pins.
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*
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* Optionally we can enable hardware flow control, by setting flow_control
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* to 1 and defining pins for cts_pin and rts_pin.
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.regs = UART0,
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.tx_pin = 29,
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.rx_pin = 28,
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#ifdef MODULE_PERIPH_UART_HW_FC
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.rts_pin = GPIO_UNDEF,
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.cts_pin = GPIO_UNDEF,
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#endif
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.intn = UART0_IRQN
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}
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};
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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#define I2C_NUMOF (1)
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#define I2C_SDA_PIN (5)
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#define I2C_SCL_PIN (6)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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