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boards/cc26xx_cc13xx: use generic hw fc module

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This commit is contained in:
Dylan Laduranty 2020-03-10 14:19:53 +01:00
parent 8e2227b18b
commit 48231efb20
4 changed files with 47 additions and 36 deletions
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7
boards/cc1312-launchpad/include/periph_conf.h
View File

@ -85,9 +85,10 @@ static const uart_conf_t uart_config[] = {
.regs = UART0,
.tx_pin = 3,
.rx_pin = 2,
.rts_pin = 18, /* ignored when flow_control is 0 */
.cts_pin = 19, /* ignored when flow_control is 0 */
.flow_control = 0,
#ifdef MODULE_PERIPH_UART_HW_FC
.rts_pin = 18,
.cts_pin = 19,
#endif
.intn = UART0_IRQN
}
};

33
boards/cc1352-launchpad/include/periph_conf.h
View File

@ -71,23 +71,30 @@ static const timer_conf_t timer_config[] = {
* The TI CC1352 LaunchPad board only has access to a single UART device through
* the debugger, so all we need to configure are the RX and TX pins.
*
* Optionally we can enable hardware flow control, by setting UART_HW_FLOW_CTRL
* to 1 and defining pins for cts_pin and rts_pin.
*
* Add a second UART configuration if using external pins.
* Optionally we can enable hardware flow control, by using periph_uart_hw_fc
* module (USEMODULE += periph_uart_hw_fc) and defining pins for cts_pin and
* rts_pin.
* @{
*/
/**
* @name UART configuration
*
*
* Add a second UART configuration if using external pins.
* @{
*/
static const uart_conf_t uart_config[] = {
{
.regs = UART0,
.tx_pin = 13,
.rx_pin = 12,
.rts_pin = 0, /* ignored when flow_control is 0 */
.cts_pin = 0, /* ignored when flow_control is 0 */
.flow_control = 0,
.intn = UART0_IRQN
}
{
.regs = UART0,
.tx_pin = 13,
.rx_pin = 12,
#ifdef MODULE_PERIPH_UART_HW_FC
.rts_pin = GPIO_UNDEF,
.cts_pin = GPIO_UNDEF,
#endif
.intn = UART0_IRQN
}
};
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */

24
boards/cc2650-launchpad/include/periph_conf.h
View File

@ -71,21 +71,23 @@ static const timer_conf_t timer_config[] = {
* The used CC26x0 CPU only supports a single UART device, so all we need to
* configure are the RX and TX pins.
*
* Optionally we can enable hardware flow control, by setting flow_control
* to 1 and defining pins for cts_pin and rts_pin.
* Optionally we can enable hardware flow control, by using periph_uart_hw_fc
* module (USEMODULE += periph_uart_hw_fc) and defining pins for cts_pin and
* rts_pin.
* @{
*/
static const uart_conf_t uart_config[] = {
{
.regs = UART0,
.tx_pin = 3,
.rx_pin = 2,
.rts_pin = 0, /* ignored when flow_control is 0 */
.cts_pin = 0, /* ignored when flow_control is 0 */
.flow_control = 0,
.intn = UART0_IRQN
}
{
.regs = UART0,
.tx_pin = 3,
.rx_pin = 2,
#ifdef MODULE_PERIPH_UART_HW_FC
.rts_pin = GPIO_UNDEF,
.cts_pin = GPIO_UNDEF,
#endif
.intn = UART0_IRQN
}
};
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */

19
boards/cc2650stk/include/periph_conf.h
View File

@ -75,15 +75,16 @@ static const timer_conf_t timer_config[] = {
*/
static const uart_conf_t uart_config[] = {
{
.regs = UART0,
.tx_pin = 29,
.rx_pin = 28,
.rts_pin = 0, /* ignored when flow_control is 0 */
.cts_pin = 0, /* ignored when flow_control is 0 */
.flow_control = 0,
.intn = UART0_IRQN
}
{
.regs = UART0,
.tx_pin = 29,
.rx_pin = 28,
#ifdef MODULE_PERIPH_UART_HW_FC
.rts_pin = GPIO_UNDEF,
.cts_pin = GPIO_UNDEF,
#endif
.intn = UART0_IRQN
}
};
#define UART_NUMOF ARRAY_SIZE(uart_config)
/** @} */