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a9c83017ee
Not every RISC-V implements that interrupt controller, gd32v uses CLIC instead.
10 lines
315 B
Makefile
10 lines
315 B
Makefile
FEATURES_PROVIDED += periph_cpuid
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FEATURES_PROVIDED += periph_gpio periph_gpio_irq
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FEATURES_PROVIDED += periph_pm
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FEATURES_PROVIDED += periph_plic
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FEATURES_PROVIDED += periph_rtt_overflow
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FEATURES_PROVIDED += periph_rtt_set_counter
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FEATURES_PROVIDED += periph_wdt
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include $(RIOTCPU)/riscv_common/Makefile.features
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