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RIOT/cpu/fe310/Kconfig
Benjamin Valentin a9c83017ee cpu/riscv_common: only select PLIC for fe310
Not every RISC-V implements that interrupt controller, gd32v uses
CLIC instead.
2021-08-25 10:49:47 +02:00

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# Copyright (c) 2020 Inria
#
# This file is subject to the terms and conditions of the GNU Lesser
# General Public License v2.1. See the file LICENSE in the top level
# directory for more details.
#
config CPU_FAM_FE310
bool
select CPU_CORE_RV32I
select HAS_CPU_FE310
select HAS_PERIPH_CPUID
select HAS_PERIPH_GPIO
select HAS_PERIPH_GPIO_IRQ
select HAS_PERIPH_PM
select HAS_PERIPH_PLIC
select HAS_PERIPH_RTT_OVERFLOW
select HAS_PERIPH_RTT_SET_COUNTER
select HAS_PERIPH_WDT
config CPU_MODEL_FE310_G000
bool
select CPU_FAM_FE310
config CPU_MODEL_FE310_G002
bool
select CPU_FAM_FE310
## Definition of specific features
config HAS_CPU_FE310
bool
help
Indicates that a 'fe310' cpu is being used.
config CPU_FAM
default "fe310" if CPU_FAM_FE310
config CPU_MODEL
default "fe310_g000" if CPU_MODEL_FE310_G000
default "fe310_g002" if CPU_MODEL_FE310_G002
config CPU
default "fe310" if CPU_FAM_FE310
rsource "Kconfig.clk"
source "$(RIOTCPU)/riscv_common/Kconfig"