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RIOT/cpu/esp_common
iosabi 52107b2416 esp8266: Support UART1 and other UART0 pins.
The esp8266 CPU has actually two hardware UART peripherals. UART0 is
used by the boot ROM for flashing and serial output during boot,
typically at a baudrate of 74880 bps until the bootloader or application
sets the more standard 115200 baudrate. This UART0 device has two
possible pins for TXD, GPIO1 and GPIO2, which are both set to TXD by the
boot ROM. esp8266 modules will typically have GPIO1 labeled as the TX
pin, but it is possible to use GPIO2 for that purpose even while
flashing the device with esptool.py.

The second device, UART1, also has two options for TXD, GPIO2 and GPIO7,
and only one option for RXD, GPIO8. However, GPIO7 and GPIO8 are used
by the flash internally so those options are not very useful unless
maybe while running from IRAM with the flash disabled, for example for
a debugger over UART1.

This patch allows boards to override UART{0,1}_{R,T}XD in their
periph_conf.h to configure the uart selection. Defining UART1_TX will
make the UART_DEV(1) device available.

Tested with:

```CFLAGS='-DUART1_TXD=GPIO2' make -C tests/periph_uart BOARD=esp8266-esp-12x flash term```

* Connected one USB-UART to the standard GPIO1 and GPIO3 for flashing
  and console. After flashing we see the manual test output at 115200
  bps

* Connected a second USB-UART with RX to GPIO2 running at 74880.

Then run on the first console:
```
> init 1 74880
> send 1 hello
```

The word "hello" appears on the second UART connection.

Note that GPIO2 is used during boot for UART0's TX until the application
or bootloader set it to a regular GPIO, so some boot ROM messages at
74880 bps are visible. After running `init 1 74880` it is set to UART1's
TX.
2021-05-02 12:27:27 +00:00
..
esp-now cpu/esp_common: Add missing includes and ISO-C++ compatibility 2021-01-10 18:02:39 +01:00
esp-wifi cpu/*: replace #if ENABLE_DEBUG with IS_ACTIVE 2020-11-02 21:34:12 +01:00
freertos cpu/*: realign ENABLE_DEBUG 2020-10-23 00:46:26 +02:00
include Merge pull request #15465 from maribu/atomic-utils-volatile 2020-11-24 22:05:33 +01:00
periph esp8266: Support UART1 and other UART0 pins. 2021-05-02 12:27:27 +00:00
vendor cpu/esp*: move some vendor/esp code to cpu/esp_common 2020-02-21 09:09:34 +01:00
doc.txt cpu/esp_common: added for common files for ESP SoC 2018-12-27 17:28:46 +01:00
esp_events.c esp/esp*: move common code to cpu/esp_common 2020-02-21 09:09:34 +01:00
exceptions.c cpu/*: realign ENABLE_DEBUG 2020-10-23 00:46:26 +02:00
irq_arch.c cpu/*: reorder ENABLE_DEBUG after last include 2020-10-23 00:45:55 +02:00
Kconfig treewide: model newlib as a FEATURE 2021-01-27 09:24:25 +01:00
lib_printf.c cpu/esp_common: functions for SDK log outputs 2019-12-20 17:58:58 +01:00
Makefile cpu/esp8266: move esp_wifi to cpu/esp_common 2020-02-21 09:09:34 +01:00
Makefile.dep treewide: model newlib as a FEATURE 2021-01-27 09:24:25 +01:00
Makefile.features treewide: model newlib as a FEATURE 2021-01-27 09:24:25 +01:00
Makefile.include cpu/esp: set esptool as supported programmer 2021-02-24 13:29:56 +01:00
syscalls.c cpu/*: realign ENABLE_DEBUG 2020-10-23 00:46:26 +02:00
thread_arch.c cpu/esp*: Fix cast alignment issues 2020-11-18 10:19:23 +01:00
tools.c esp/esp*: move common code to cpu/esp_common 2020-02-21 09:09:34 +01:00