mirror of
https://github.com/RIOT-OS/RIOT.git
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217 lines
6.4 KiB
C
217 lines
6.4 KiB
C
/*
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* Copyright (C) 2021 Mesotic SAS
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_nrf9160
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* @{
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*
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* @file
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* @brief nRF9160 specific definitions for handling peripherals
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*
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* @author Dylan Laduranty <dylan.laduranty@mesotic.com>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include "periph_cpu_common.h"
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#include "macros/units.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief System core clock speed, fixed to 64MHz for all NRF9160 CPUs
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*/
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#define CLOCK_CORECLOCK MHZ(64)
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/**
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* @brief Peripheral clock speed (fixed to 16MHz for nRF9160 based CPUs)
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*/
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#define PERIPH_CLOCK MHZ(16)
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/**
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* @brief Structure for UART configuration data
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*/
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typedef struct {
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NRF_UARTE_Type *dev; /**< UART with EasyDMA device base
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* register address */
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gpio_t rx_pin; /**< RX pin */
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gpio_t tx_pin; /**< TX pin */
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#ifdef MODULE_PERIPH_UART_HW_FC
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gpio_t rts_pin; /**< RTS pin */
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gpio_t cts_pin; /**< CTS pin */
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#endif
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uint8_t irqn; /**< IRQ channel */
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} uart_conf_t;
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/**
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* @brief Size of the UART TX buffer for non-blocking mode.
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*/
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#ifndef UART_TXBUF_SIZE
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#define UART_TXBUF_SIZE (64)
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#endif
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#ifndef DOXYGEN
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/**
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* @brief Wrapper to fix differences between nRF9160 and
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* nRF52 vendor files
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*/
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#define UART_BAUDRATE_BAUDRATE_Baud1200 UARTE_BAUDRATE_BAUDRATE_Baud1200
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#define UART_BAUDRATE_BAUDRATE_Baud2400 UARTE_BAUDRATE_BAUDRATE_Baud2400
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#define UART_BAUDRATE_BAUDRATE_Baud4800 UARTE_BAUDRATE_BAUDRATE_Baud4800
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#define UART_BAUDRATE_BAUDRATE_Baud9600 UARTE_BAUDRATE_BAUDRATE_Baud9600
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#define UART_BAUDRATE_BAUDRATE_Baud14400 UARTE_BAUDRATE_BAUDRATE_Baud14400
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#define UART_BAUDRATE_BAUDRATE_Baud19200 UARTE_BAUDRATE_BAUDRATE_Baud19200
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#define UART_BAUDRATE_BAUDRATE_Baud28800 UARTE_BAUDRATE_BAUDRATE_Baud28800
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#define UART_BAUDRATE_BAUDRATE_Baud31250 UARTE_BAUDRATE_BAUDRATE_Baud31250
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#define UART_BAUDRATE_BAUDRATE_Baud38400 UARTE_BAUDRATE_BAUDRATE_Baud38400
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#define UART_BAUDRATE_BAUDRATE_Baud56000 UARTE_BAUDRATE_BAUDRATE_Baud56000
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#define UART_BAUDRATE_BAUDRATE_Baud57600 UARTE_BAUDRATE_BAUDRATE_Baud57600
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#define UART_BAUDRATE_BAUDRATE_Baud76800 UARTE_BAUDRATE_BAUDRATE_Baud76800
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#define UART_BAUDRATE_BAUDRATE_Baud115200 UARTE_BAUDRATE_BAUDRATE_Baud115200
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#define UART_BAUDRATE_BAUDRATE_Baud230400 UARTE_BAUDRATE_BAUDRATE_Baud230400
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#define UART_BAUDRATE_BAUDRATE_Baud250000 UARTE_BAUDRATE_BAUDRATE_Baud250000
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#define UART_BAUDRATE_BAUDRATE_Baud460800 UARTE_BAUDRATE_BAUDRATE_Baud460800
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#define UART_BAUDRATE_BAUDRATE_Baud921600 UARTE_BAUDRATE_BAUDRATE_Baud921600
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#define UART_BAUDRATE_BAUDRATE_Baud1M UARTE_BAUDRATE_BAUDRATE_Baud1M
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/**
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* @brief Override I2C speed settings
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* @{
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*/
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#define HAVE_I2C_SPEED_T
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typedef enum {
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I2C_SPEED_LOW = 0xff, /**< not supported */
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I2C_SPEED_NORMAL = TWIM_FREQUENCY_FREQUENCY_K100, /**< 100kbit/s */
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I2C_SPEED_FAST = TWIM_FREQUENCY_FREQUENCY_K400, /**< 400kbit/s */
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I2C_SPEED_FAST_PLUS = 0xfe, /**< not supported */
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I2C_SPEED_HIGH = 0xfd, /**< not supported */
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} i2c_speed_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief I2C (TWI) configuration options
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*/
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typedef struct {
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NRF_TWIM_Type *dev; /**< TWIM hardware device */
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gpio_t scl; /**< SCL pin */
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gpio_t sda; /**< SDA pin */
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i2c_speed_t speed; /**< Bus speed */
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} i2c_conf_t;
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/** @} */
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/**
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* @name Use shared I2C functions
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* @{
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*/
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#define PERIPH_I2C_NEED_READ_REG
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#define PERIPH_I2C_NEED_WRITE_REG
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/** @} */
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/**
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* @name Define macros for sda and scl pin to be able to reinitialize them
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* @{
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*/
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#define i2c_pin_sda(dev) i2c_config[dev].sda
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#define i2c_pin_scl(dev) i2c_config[dev].scl
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/** @} */
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/**
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* @brief Defines macros for SPI pins initialization
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* @{
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*/
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#define SPI_SCKSEL (dev(bus)->PSEL.SCK)
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#define SPI_MOSISEL (dev(bus)->PSEL.MOSI)
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#define SPI_MISOSEL (dev(bus)->PSEL.MISO)
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/** @} */
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/**
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* @brief SPI temporary buffer size for storing const data in RAM before
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* initiating DMA transfer
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*/
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#ifndef CONFIG_SPI_MBUF_SIZE
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#define CONFIG_SPI_MBUF_SIZE 64
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#endif
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/**
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* @brief SPI configuration values
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*/
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typedef struct {
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NRF_SPIM_Type *dev; /**< SPI device used */
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gpio_t sclk; /**< CLK pin */
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gpio_t mosi; /**< MOSI pin */
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gpio_t miso; /**< MISO pin */
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} spi_conf_t;
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#ifndef DOXYGEN
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/**
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* @brief Override SPI mode values
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* @{
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*/
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#define HAVE_SPI_MODE_T
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typedef enum {
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SPI_MODE_0 = 0, /**< CPOL=0, CPHA=0 */
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SPI_MODE_1 = SPIM_CONFIG_CPHA_Msk, /**< CPOL=0, CPHA=1 */
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SPI_MODE_2 = SPIM_CONFIG_CPOL_Msk, /**< CPOL=1, CPHA=0 */
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SPI_MODE_3 = (SPIM_CONFIG_CPOL_Msk | SPIM_CONFIG_CPHA_Msk) /**< CPOL=1, CPHA=1 */
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} spi_mode_t;
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/** @} */
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/**
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* @brief Override SPI clock values
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* @{
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*/
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#define HAVE_SPI_CLK_T
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typedef enum {
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SPI_CLK_100KHZ = SPIM_FREQUENCY_FREQUENCY_K125, /**< 100KHz */
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SPI_CLK_400KHZ = SPIM_FREQUENCY_FREQUENCY_K500, /**< 400KHz */
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SPI_CLK_1MHZ = SPIM_FREQUENCY_FREQUENCY_M1, /**< 1MHz */
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SPI_CLK_5MHZ = SPIM_FREQUENCY_FREQUENCY_M4, /**< 5MHz */
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SPI_CLK_10MHZ = SPIM_FREQUENCY_FREQUENCY_M8 /**< 10MHz */
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} spi_clk_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief Common SPI/I2C interrupt callback
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*
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* @param arg Opaque context pointer
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*/
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typedef void (*spi_twi_irq_cb_t)(void *arg);
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/**
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* @brief Reqister a SPI IRQ handler for a shared I2C/SPI irq vector
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*
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* @param bus bus to register the IRQ handler on
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* @param cb callback to call on IRQ
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* @param arg Argument to pass to the handler
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*/
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void spi_twi_irq_register_spi(NRF_SPIM_Type *bus,
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spi_twi_irq_cb_t cb, void *arg);
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/**
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* @brief Reqister a I2C IRQ handler for a shared I2C/SPI irq vector
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*
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* @param bus bus to register the IRQ handler on
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* @param cb callback to call on IRQ
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* @param arg Argument to pass to the handler
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*/
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void spi_twi_irq_register_i2c(NRF_TWIM_Type *bus,
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spi_twi_irq_cb_t cb, void *arg);
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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