mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
136 lines
3.3 KiB
C
136 lines
3.3 KiB
C
/*
|
|
* Copyright (C) 2016 Freie Universität Berlin
|
|
* 2016 Inria
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU Lesser
|
|
* General Public License v2.1. See the file LICENSE in the top level
|
|
* directory for more details.
|
|
*/
|
|
|
|
/**
|
|
* @ingroup boards_nucleo-f070
|
|
* @{
|
|
*
|
|
* @file
|
|
* @brief Peripheral MCU configuration for the nucleo-f070 board
|
|
*
|
|
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
|
|
* @author Alexandre Aabdie <alexandre.abadie@inria.fr>
|
|
*/
|
|
|
|
#ifndef PERIPH_CONF_H_
|
|
#define PERIPH_CONF_H_
|
|
|
|
#ifdef __cplusplus
|
|
extern "C" {
|
|
#endif
|
|
|
|
/**
|
|
* @name Clock system configuration
|
|
* @{
|
|
*/
|
|
#define CLOCK_HSE (8000000U) /* external oscillator */
|
|
#define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */
|
|
|
|
/* the actual PLL values are automatically generated */
|
|
#define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSE)
|
|
/** @} */
|
|
|
|
/**
|
|
* @brief Timer configuration
|
|
* @{
|
|
*/
|
|
#define TIMER_NUMOF (1U)
|
|
#define TIMER_0_EN 1
|
|
#define TIMER_IRQ_PRIO 1
|
|
|
|
/* Timer 0 configuration */
|
|
#define TIMER_0_DEV TIM3
|
|
#define TIMER_0_CHANNELS 4
|
|
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
|
|
#define TIMER_0_MAX_VALUE (0xffffffff)
|
|
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN)
|
|
#define TIMER_0_IRQ_CHAN TIM3_IRQn
|
|
#define TIMER_0_ISR isr_tim3
|
|
/** @} */
|
|
|
|
/**
|
|
* @brief UART configuration
|
|
* @}
|
|
*/
|
|
#define UART_NUMOF (2U)
|
|
#define UART_0_EN 1
|
|
#define UART_1_EN 1
|
|
#define UART_IRQ_PRIO 1
|
|
|
|
/* UART 0 device configuration */
|
|
#define UART_0_DEV USART2
|
|
#define UART_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART2EN)
|
|
#define UART_0_CLKDIS() (RCC->APB1ENR &= (~RCC_APB1ENR_USART2EN))
|
|
#define UART_0_IRQ USART2_IRQn
|
|
#define UART_0_ISR isr_usart2
|
|
/* UART 0 pin configuration */
|
|
#define UART_0_PORT GPIOA
|
|
#define UART_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN)
|
|
#define UART_0_RX_PIN 3
|
|
#define UART_0_TX_PIN 2
|
|
#define UART_0_AF 1
|
|
|
|
/* UART 1 device configuration */
|
|
#define UART_1_DEV USART3
|
|
#define UART_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART3EN)
|
|
#define UART_1_CLKDIS() (RCC->APB1ENR &= (~RCC_APB1ENR_USART3EN))
|
|
#define UART_1_IRQ USART3_4_IRQn
|
|
#define UART_1_ISR isr_usart3_8
|
|
/* UART 1 pin configuration */
|
|
#define UART_1_PORT GPIOC
|
|
#define UART_1_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOCEN)
|
|
#define UART_1_RX_PIN 11
|
|
#define UART_1_TX_PIN 10
|
|
#define UART_1_AF 1
|
|
/** @} */
|
|
|
|
|
|
/**
|
|
* @brief ADC configuration
|
|
* @{
|
|
*/
|
|
#define ADC_CONFIG { \
|
|
{ GPIO_PIN(PORT_A, 0), 0 },\
|
|
{ GPIO_PIN(PORT_A, 1), 1 },\
|
|
{ GPIO_PIN(PORT_A, 4), 4 },\
|
|
{ GPIO_PIN(PORT_B, 0), 8 },\
|
|
{ GPIO_PIN(PORT_C, 1), 11 },\
|
|
{ GPIO_PIN(PORT_C, 0), 10 } \
|
|
}
|
|
|
|
#define ADC_NUMOF (6)
|
|
/** @} */
|
|
|
|
|
|
/**
|
|
* @brief DAC configuration
|
|
* @{
|
|
*/
|
|
#define DAC_NUMOF (0)
|
|
/** @} */
|
|
|
|
/**
|
|
* @name RTC configuration
|
|
* @{
|
|
*/
|
|
/**
|
|
* Nucleos with MB1136 C-02 or MB1136 C-03 -sticker on it have the required LSE
|
|
* oscillator provided on the X2 slot.
|
|
* See Nucleo User Manual UM1724 section 5.6.2.
|
|
*/
|
|
#define RTC_NUMOF (1U)
|
|
/** @} */
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* PERIPH_CONF_H_ */
|
|
/** @} */
|