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mirror of https://github.com/RIOT-OS/RIOT.git synced 2024-12-29 04:50:03 +01:00

boards/nucleo-f070: initial support for nucleo-f070 board

This commit is contained in:
Alexandre Abadie 2016-08-29 10:56:13 +02:00
parent efe3d52ba4
commit 1659f56904
19 changed files with 256 additions and 12 deletions

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MODULE = board
include $(RIOTBASE)/Makefile.base

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include $(RIOTBOARD)/nucleo-common/Makefile.dep

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# Put defined MCU peripherals here (in alphabetical order)
FEATURES_PROVIDED += periph_cpuid
FEATURES_PROVIDED += periph_gpio
FEATURES_PROVIDED += periph_rtc
FEATURES_PROVIDED += periph_timer
FEATURES_PROVIDED += periph_uart
# Various other features (if any)
FEATURES_PROVIDED += cpp
# The board MPU family (used for grouping by the CI system)
FEATURES_MCU_GROUP = cortex_m0_1

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@ -0,0 +1,6 @@
## the cpu to build for
export CPU = stm32f0
export CPU_MODEL = stm32f070rb
# load the common Makefile.include for Nucleo boards
include $(RIOTBOARD)/nucleo-common/Makefile.include

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/*
* Copyright (C) 2016 Freie Universität Berlin
* 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_nucleo-f070
* @{
*
* @file
* @brief Board specific implementations for the nucleo-f070 board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Abadie <alexandre.abadie@inria.fr>
*
* @}
*/
#include "board.h"
#include "periph/gpio.h"
void board_init(void)
{
/* initialize the boards LED */
gpio_init(LED0_PIN, GPIO_OUT);
/* initialize the CPU */
cpu_init();
}

1
boards/nucleo-f070/dist/openocd.cfg vendored Normal file
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source [find board/st_nucleo_f0.cfg]

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/*
* Copyright (C) 2016 Freie Universität Berlin
* 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @defgroup boards_nucleo-f072 Nucleo-F072
* @ingroup boards
* @brief Board specific files for the nucleo-f072 board
* @{
*
* @file
* @brief Board specific definitions for the nucleo-f072 board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Mohmmad Ayman <mohmmad.khzrag@gmail.com>
* @author José Alamos <jialamos@uc.cl>
* @author Alexandre Aabdie <alexandre.abadie@inria.fr>
*/
#ifndef BOARD_H_
#define BOARD_H_
#include <stdint.h>
#include "board_common.h"
#include "cpu.h"
#include "periph_conf.h"
#ifdef __cplusplus
extern "C" {
#endif
/**
* @brief Initialize board specific hardware, including clock, LEDs and std-IO
*/
void board_init(void);
#ifdef __cplusplus
}
#endif
#endif /* BOARD_H_ */
/** @} */

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/*
* Copyright (C) 2016 Freie Universität Berlin
* 2016 Inria
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup boards_nucleo-f070
* @{
*
* @file
* @brief Peripheral MCU configuration for the nucleo-f070 board
*
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
* @author Alexandre Aabdie <alexandre.abadie@inria.fr>
*/
#ifndef PERIPH_CONF_H_
#define PERIPH_CONF_H_
#ifdef __cplusplus
extern "C" {
#endif
/**
* @name Clock system configuration
* @{
*/
#define CLOCK_HSE (8000000U) /* external oscillator */
#define CLOCK_CORECLOCK (48000000U) /* desired core clock frequency */
/* the actual PLL values are automatically generated */
#define CLOCK_PLL_MUL (CLOCK_CORECLOCK / CLOCK_HSE)
/** @} */
/**
* @brief Timer configuration
* @{
*/
#define TIMER_NUMOF (1U)
#define TIMER_0_EN 1
#define TIMER_IRQ_PRIO 1
/* Timer 0 configuration */
#define TIMER_0_DEV TIM3
#define TIMER_0_CHANNELS 4
#define TIMER_0_FREQ (CLOCK_CORECLOCK)
#define TIMER_0_MAX_VALUE (0xffffffff)
#define TIMER_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_TIM3EN)
#define TIMER_0_IRQ_CHAN TIM3_IRQn
#define TIMER_0_ISR isr_tim3
/** @} */
/**
* @brief UART configuration
* @}
*/
#define UART_NUMOF (2U)
#define UART_0_EN 1
#define UART_1_EN 1
#define UART_IRQ_PRIO 1
/* UART 0 device configuration */
#define UART_0_DEV USART2
#define UART_0_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART2EN)
#define UART_0_CLKDIS() (RCC->APB1ENR &= (~RCC_APB1ENR_USART2EN))
#define UART_0_IRQ USART2_IRQn
#define UART_0_ISR isr_usart2
/* UART 0 pin configuration */
#define UART_0_PORT GPIOA
#define UART_0_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOAEN)
#define UART_0_RX_PIN 3
#define UART_0_TX_PIN 2
#define UART_0_AF 1
/* UART 1 device configuration */
#define UART_1_DEV USART3
#define UART_1_CLKEN() (RCC->APB1ENR |= RCC_APB1ENR_USART3EN)
#define UART_1_CLKDIS() (RCC->APB1ENR &= (~RCC_APB1ENR_USART3EN))
#define UART_1_IRQ USART3_4_IRQn
#define UART_1_ISR isr_usart3_8
/* UART 1 pin configuration */
#define UART_1_PORT GPIOC
#define UART_1_PORT_CLKEN() (RCC->AHBENR |= RCC_AHBENR_GPIOCEN)
#define UART_1_RX_PIN 11
#define UART_1_TX_PIN 10
#define UART_1_AF 1
/** @} */
/**
* @brief ADC configuration
* @{
*/
#define ADC_CONFIG { \
{ GPIO_PIN(PORT_A, 0), 0 },\
{ GPIO_PIN(PORT_A, 1), 1 },\
{ GPIO_PIN(PORT_A, 4), 4 },\
{ GPIO_PIN(PORT_B, 0), 8 },\
{ GPIO_PIN(PORT_C, 1), 11 },\
{ GPIO_PIN(PORT_C, 0), 10 } \
}
#define ADC_NUMOF (6)
/** @} */
/**
* @brief DAC configuration
* @{
*/
#define DAC_NUMOF (0)
/** @} */
/**
* @name RTC configuration
* @{
*/
/**
* Nucleos with MB1136 C-02 or MB1136 C-03 -sticker on it have the required LSE
* oscillator provided on the X2 slot.
* See Nucleo User Manual UM1724 section 5.6.2.
*/
#define RTC_NUMOF (1U)
/** @} */
#ifdef __cplusplus
}
#endif
#endif /* PERIPH_CONF_H_ */
/** @} */

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@ -11,7 +11,7 @@ BOARD_INSUFFICIENT_MEMORY := airfy-beacon cc2650stk msb-430 msb-430h pca10000 pc
nrf51dongle nrf6310 nucleo-f103 nucleo-f334 \
spark-core stm32f0discovery telosb \
weio wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1 nucleo-f072 \
nucleo-f030
nucleo-f030 nucleo-f070
# use ethos (ethernet over serial) for network communication and stdio over
# UART, but not on native, as native has a tap interface towards the host.

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@ -10,7 +10,7 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos msb-430 msb-430h nrf51dongle \
nrf6310 nucleo-f103 nucleo-f334 pca10000 pca10005 spark-core \
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 \
yunjia-nrf51822 z1 nucleo-f072 nucleo-f030
yunjia-nrf51822 z1 nucleo-f072 nucleo-f030 nucleo-f070
# Include packages that pull up and auto-init the link layer.
# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present

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@ -10,7 +10,8 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos msb-430 msb-430h nrf51dongle \
nrf6310 nucleo-f103 nucleo-f334 pca10000 pca10005 \
spark-core stm32f0discovery telosb weio wsn430-v1_3b \
wsn430-v1_4 yunjia-nrf51822 z1 nucleo-f072 nucleo-f030
wsn430-v1_4 yunjia-nrf51822 z1 nucleo-f072 nucleo-f030 \
nucleo-f070
# Include packages that pull up and auto-init the link layer.
# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present

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@ -10,7 +10,7 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos msb-430 msb-430h nrf51dongle \
nrf6310 pca10000 pca10005 spark-core \
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 \
yunjia-nrf51822 z1 nucleo-f072 nucleo-f030
yunjia-nrf51822 z1 nucleo-f072 nucleo-f030 nucleo-f070
# Include packages that pull up and auto-init the link layer.
# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present

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@ -10,7 +10,7 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos msb-430 msb-430h nrf51dongle nrf6310 \
nucleo-f334 pca10000 pca10005 stm32f0discovery telosb weio \
wsn430-v1_3b wsn430-v1_4 yunjia-nrf51822 z1 nucleo-f072 \
nucleo-f030
nucleo-f030 nucleo-f070
# Include packages that pull up and auto-init the link layer.
# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present

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@ -5,7 +5,8 @@ include ../Makefile.tests_common
BOARD_BLACKLIST := arduino-mega2560 chronos msb-430 msb-430h telosb wsn430-v1_3b \
wsn430-v1_4 z1 waspmote-pro arduino-uno arduino-duemilanove
BOARD_INSUFFICIENT_MEMORY := chronos msb-430 msb-430h nucleo-f334 nucleo-f030 \
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 z1
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 z1 \
nucleo-f070
USEMODULE += gnrc_ipv6
USEMODULE += gnrc_conn_udp

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@ -5,7 +5,7 @@ BOARD ?= native
RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := chronos msb-430 msb-430h nucleo-f334 stm32f0discovery telosb \
weio wsn430-v1_3b wsn430-v1_4 z1 nucleo-f030
weio wsn430-v1_3b wsn430-v1_4 z1 nucleo-f030 nucleo-f070
USEMODULE += gnrc_netdev_default
USEMODULE += auto_init_gnrc_netif

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@ -10,7 +10,7 @@ RIOTBASE ?= $(CURDIR)/../..
BOARD_INSUFFICIENT_MEMORY := airfy-beacon chronos msb-430 msb-430h nrf51dongle \
nrf6310 nucleo-f103 nucleo-f334 pca10000 pca10005 spark-core \
stm32f0discovery telosb weio wsn430-v1_3b wsn430-v1_4 \
yunjia-nrf51822 z1 nucleo-f030
yunjia-nrf51822 z1 nucleo-f030 nucleo-f070
# Include packages that pull up and auto-init the link layer.
# NOTE: 6LoWPAN will be included if IEEE802.15.4 devices are present

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@ -1,7 +1,8 @@
APPLICATION = driver_slip
include ../Makefile.tests_common
BOARD_INSUFFICIENT_MEMORY := msb-430 msb-430h nucleo-f334 stm32f0discovery weio nucleo-f030
BOARD_INSUFFICIENT_MEMORY := msb-430 msb-430h nucleo-f334 stm32f0discovery weio \
nucleo-f030
USEMODULE += auto_init_gnrc_netif
USEMODULE += gnrc

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@ -5,7 +5,7 @@ BOARD_INSUFFICIENT_MEMORY := cc2650stk chronos msb-430 msb-430h mbed_lpc1768 \
stm32f0discovery pca10000 pca10005 \
yunjia-nrf51822 spark-core airfy-beacon nucleo-f103 \
nucleo-f334 nrf51dongle nrf6310 weio nucleo-f072 \
nucleo-f030
nucleo-f030 nucleo-f070
DISABLE_MODULE += auto_init

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@ -8,7 +8,7 @@ BOARD_INSUFFICIENT_MEMORY := airfy-beacon cc2650stk chronos msb-430 msb-430h pca
arduino-mega2560 airfy-beacon nrf51dongle nrf6310 \
weio waspmote-pro nucleo-f072 arduino-uno \
arduino-duemilanove sodaq-autonomo arduino-zero \
nucleo-f030
nucleo-f030 nucleo-f070
USEMODULE += embunit
@ -26,7 +26,7 @@ ARM_CORTEX_M_BOARDS := airfy-beacon arduino-due cc2538dk ek-lm4f120xl f4vi1 fox
nucleo-f091 nucleo-f303 nucleo-f334 nucleo-f401 nucleo-l1 openmote-cc2538 \
pba-d-01-kw2x pca10000 pca10005 remote saml21-xpro samr21-xpro slwstk6220a \
spark-core stm32f0discovery stm32f3discovery stm32f4discovery udoo weio \
yunjia-nrf51822 sodaq-autonomo arduino-zero nucleo-f030
yunjia-nrf51822 sodaq-autonomo arduino-zero nucleo-f030 nucleo-f070
DISABLE_TEST_FOR_ARM_CORTEX_M := tests-relic